Searched refs:plx_regbase (Results 1 – 2 of 2) sorted by relevance
146 void __iomem *plx_regbase; /* PLX configuration base address */ member358 writel(0x00, devpriv->plx_regbase + PLX9052_INTCSR); in me2600_xilinx_download()398 value = readl(devpriv->plx_regbase + PLX9052_INTCSR); in me2600_xilinx_download()401 writel(0x00, devpriv->plx_regbase + PLX9052_INTCSR); in me2600_xilinx_download()413 devpriv->plx_regbase + PLX9052_INTCSR); in me2600_xilinx_download()460 devpriv->plx_regbase = pci_ioremap_bar(pcidev, 0); in me_auto_attach()461 if (!devpriv->plx_regbase) in me_auto_attach()528 if (devpriv->plx_regbase) in me_detach()529 iounmap(devpriv->plx_regbase); in me_detach()
163 unsigned long plx_regbase; member335 outl(PLX9052_INTCSR_LI2POL, devpriv->plx_regbase + PLX9052_INTCSR); in me4000_xilinx_download()338 val = inl(devpriv->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()340 outl(val, devpriv->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()347 val = inl(devpriv->plx_regbase + PLX9052_INTCSR); in me4000_xilinx_download()354 val = inl(devpriv->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()356 outl(val, devpriv->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()370 val = inl(devpriv->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()379 val = inl(devpriv->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()387 val = inl(devpriv->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()[all …]