Searched refs:pll_ref_div (Results 1 - 8 of 8) sorted by relevance
/linux-4.4.14/drivers/clk/tegra/ |
H A D | clk-tegra-fixed.c | 39 u32 val, pll_ref_div; tegra_osc_clk_init() local 68 pll_ref_div = 1 << val; tegra_osc_clk_init() 74 0, 1, pll_ref_div); tegra_osc_clk_init() 78 *pll_ref_freq = *osc_freq / pll_ref_div; tegra_osc_clk_init()
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H A D | clk-tegra20.c | 586 u32 pll_ref_div = osc_ctrl & OSC_CTRL_PLL_REF_DIV_MASK; tegra20_clk_measure_input_freq() local 591 BUG_ON(pll_ref_div != OSC_CTRL_PLL_REF_DIV_1); tegra20_clk_measure_input_freq() 595 BUG_ON(pll_ref_div != OSC_CTRL_PLL_REF_DIV_1); tegra20_clk_measure_input_freq() 599 BUG_ON(pll_ref_div != OSC_CTRL_PLL_REF_DIV_1); tegra20_clk_measure_input_freq() 603 BUG_ON(pll_ref_div != OSC_CTRL_PLL_REF_DIV_1); tegra20_clk_measure_input_freq() 618 u32 pll_ref_div = readl_relaxed(clk_base + OSC_CTRL) & tegra20_get_pll_ref_div() local 621 switch (pll_ref_div) { tegra20_get_pll_ref_div() 629 pr_err("Invalied pll ref divider %d\n", pll_ref_div); tegra20_get_pll_ref_div() 881 unsigned int pll_ref_div; tegra20_osc_clk_init() local 891 pll_ref_div = tegra20_get_pll_ref_div(); tegra20_osc_clk_init() 893 CLK_SET_RATE_PARENT, 1, pll_ref_div); tegra20_osc_clk_init()
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/linux-4.4.14/drivers/video/fbdev/aty/ |
H A D | mach64_ct.c | 215 q = par->ref_clk_per * pll->pll_ref_div * 4 / vclk_per; aty_valid_pll_ct() 228 (par->ref_clk_per * pll->pll_ref_div); aty_valid_pll_ct() 267 ret = par->ref_clk_per * pll->ct.pll_ref_div * pll->ct.vclk_post_div_real / pll->ct.vclk_fb_div / 2; aty_pll_to_var_ct() 296 pll->ct.pll_ref_div, pll->ct.vclk_post_div, pll->ct.vclk_post_div_real); aty_set_pll_ct() 387 pll->ct.pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par); aty_get_pll_ct() 513 pll->ct.pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par); aty_init_pll_ct() 523 pll->ct.pll_ref_div = par->pll_per * 2 * 255 / par->ref_clk_per; aty_init_pll_ct() 526 q = par->ref_clk_per * pll->ct.pll_ref_div * 8 / aty_init_pll_ct() 550 (par->ref_clk_per * pll->ct.pll_ref_div); aty_init_pll_ct() 577 q = par->ref_clk_per * pll->ct.pll_ref_div * 4 / par->mclk_per; aty_init_pll_ct() 591 (par->ref_clk_per * pll->ct.pll_ref_div); aty_init_pll_ct() 626 aty_st_pll_ct(PLL_REF_DIV, pll->ct.pll_ref_div, par); aty_resume_pll_ct()
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H A D | atyfb.h | 82 u8 pll_ref_div; member in struct:pll_ct
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H A D | atyfb_base.c | 1811 u8 pll_ref_div; member in struct:atyclk 1869 clk.pll_ref_div = pll->ct.pll_ref_div; atyfb_ioctl() 1895 pll->ct.pll_ref_div = clk.pll_ref_div; atyfb_ioctl() 2466 u8 pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par); aty_init() local 2468 if (pll_ref_div) { aty_init() 2470 diff1 = 510 * 14 / pll_ref_div - par->pll_limits.pll_max; aty_init() 2471 diff2 = 510 * 29 / pll_ref_div - par->pll_limits.pll_max; aty_init()
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/linux-4.4.14/drivers/gpu/drm/radeon/ |
H A D | radeon_legacy_crtc.c | 747 uint32_t pll_ref_div = 0; radeon_set_pll() local 802 pll_ref_div = lvds->panel_ref_divider; radeon_set_pll() 836 pll_ref_div = reference_div; radeon_set_pll() 850 pll_ref_div & 0x3ff, radeon_set_pll() 860 &pll_ref_div, &pll_fb_post_div, radeon_set_pll() 877 pll_ref_div, radeon_set_pll() 900 (unsigned)pll_ref_div, radeon_set_pll() 905 (unsigned)pll_ref_div & RADEON_P2PLL_REF_DIV_MASK, radeon_set_pll() 923 radeon_legacy_tv_adjust_pll1(encoder, &htotal_cntl, &pll_ref_div, radeon_set_pll() 934 if ((pll_ref_div == (RREG32_PLL(RADEON_PPLL_REF_DIV) & RADEON_PPLL_REF_DIV_MASK)) && radeon_set_pll() 967 if (pll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) { radeon_set_pll() 972 pll_ref_div, radeon_set_pll() 977 (pll_ref_div << R300_PPLL_REF_DIV_ACC_SHIFT), radeon_set_pll() 982 pll_ref_div, radeon_set_pll() 1006 pll_ref_div, radeon_set_pll() 1011 pll_ref_div & RADEON_PPLL_REF_DIV_MASK, radeon_set_pll()
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/linux-4.4.14/drivers/video/fbdev/ |
H A D | w100fb.h | 665 u32 pll_ref_div : 4; member in struct:pll_ref_fb_div_t
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H A D | w100fb.c | 1169 w100_pwr_state.pll_ref_fb_div.f.pll_ref_div = pll->M; w100_pll_set_clk() 1240 w100_pwr_state.pll_ref_fb_div.f.pll_ref_div = 0x0; /* M = 1 */ w100_pwm_setup()
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