Searched refs:ocfg (Results 1 - 4 of 4) sorted by relevance
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
H A D | sorgm204.c | 103 struct nvbios_dpcfg ocfg; gm204_sor_dp_drv_ctl() local 112 &ver, &hdr, &cnt, &len, &ocfg); gm204_sor_dp_drv_ctl() 115 ocfg.tx_pu &= 0x0f; gm204_sor_dp_drv_ctl() 120 if ((data[2] & 0x00000f00) < (ocfg.tx_pu << 8) || ln == 0) gm204_sor_dp_drv_ctl() 121 data[2] = (data[2] & ~0x00000f00) | (ocfg.tx_pu << 8); gm204_sor_dp_drv_ctl() 122 nvkm_wr32(device, 0x61c118 + loff, data[0] | (ocfg.dc << shift)); gm204_sor_dp_drv_ctl() 123 nvkm_wr32(device, 0x61c120 + loff, data[1] | (ocfg.pe << shift)); gm204_sor_dp_drv_ctl() 126 nvkm_wr32(device, 0x61c13c + loff, data[3] | (ocfg.pc << shift)); gm204_sor_dp_drv_ctl()
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H A D | sorgf119.c | 78 struct nvbios_dpcfg ocfg; gf119_sor_dp_drv_ctl() local 87 &ver, &hdr, &cnt, &len, &ocfg); gf119_sor_dp_drv_ctl() 94 if ((data[2] & 0x0000ff00) < (ocfg.tx_pu << 8) || ln == 0) gf119_sor_dp_drv_ctl() 95 data[2] = (data[2] & ~0x0000ff00) | (ocfg.tx_pu << 8); gf119_sor_dp_drv_ctl() 96 nvkm_wr32(device, 0x61c118 + loff, data[0] | (ocfg.dc << shift)); gf119_sor_dp_drv_ctl() 97 nvkm_wr32(device, 0x61c120 + loff, data[1] | (ocfg.pe << shift)); gf119_sor_dp_drv_ctl() 100 nvkm_wr32(device, 0x61c13c + loff, data[3] | (ocfg.pc << shift)); gf119_sor_dp_drv_ctl()
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H A D | sorg94.c | 131 struct nvbios_dpcfg ocfg; g94_sor_dp_drv_ctl() local 140 &ver, &hdr, &cnt, &len, &ocfg); g94_sor_dp_drv_ctl() 147 if ((data[2] & 0x0000ff00) < (ocfg.tx_pu << 8) || ln == 0) g94_sor_dp_drv_ctl() 148 data[2] = (data[2] & ~0x0000ff00) | (ocfg.tx_pu << 8); g94_sor_dp_drv_ctl() 149 nvkm_wr32(device, 0x61c118 + loff, data[0] | (ocfg.dc << shift)); g94_sor_dp_drv_ctl() 150 nvkm_wr32(device, 0x61c120 + loff, data[1] | (ocfg.pe << shift)); g94_sor_dp_drv_ctl()
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/linux-4.4.14/drivers/video/fbdev/geode/ |
H A D | display_gx1.c | 84 u32 gcfg, tcfg, ocfg, dclk_div, val; gx1_set_mode() local 143 ocfg = DC_OCFG_PCKE | DC_OCFG_PDEL | DC_OCFG_PDEH; gx1_set_mode() 144 if (info->var.bits_per_pixel == 8) ocfg |= DC_OCFG_8BPP; gx1_set_mode() 182 writel(ocfg, par->dc_regs + DC_OUTPUT_CFG); gx1_set_mode()
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