| H A D | nxt6000.c | 44 static int nxt6000_writereg(struct nxt6000_state* state, u8 reg, u8 data) nxt6000_writereg() function
80 nxt6000_writereg(state, OFDM_COR_CTL, val & ~COREACT); nxt6000_reset()
81 nxt6000_writereg(state, OFDM_COR_CTL, val | COREACT); nxt6000_reset()
106 if ((result = nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_1, nominal_rate & 0xFF)) < 0) nxt6000_set_bandwidth()
109 return nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_2, (nominal_rate >> 8) & 0xFF); nxt6000_set_bandwidth()
118 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x00 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03)); nxt6000_set_guard_interval()
121 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x01 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03)); nxt6000_set_guard_interval()
125 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x02 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03)); nxt6000_set_guard_interval()
128 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x03 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03)); nxt6000_set_guard_interval()
141 return nxt6000_writereg(state, OFDM_ITB_CTL, 0x00); nxt6000_set_inversion()
144 return nxt6000_writereg(state, OFDM_ITB_CTL, ITBINV); nxt6000_set_inversion()
161 if ((result = nxt6000_writereg(state, EN_DMD_RACQ, 0x00 | (nxt6000_readreg(state, EN_DMD_RACQ) & ~0x03))) < 0) nxt6000_set_transmission_mode()
164 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, (0x00 << 2) | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x04)); nxt6000_set_transmission_mode()
168 if ((result = nxt6000_writereg(state, EN_DMD_RACQ, 0x02 | (nxt6000_readreg(state, EN_DMD_RACQ) & ~0x03))) < 0) nxt6000_set_transmission_mode()
171 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, (0x01 << 2) | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x04)); nxt6000_set_transmission_mode()
183 nxt6000_writereg(state, RS_COR_SYNC_PARAM, SYNC_PARAM); nxt6000_setup()
184 nxt6000_writereg(state, BER_CTRL, /*(1 << 2) | */ (0x01 << 1) | 0x01); nxt6000_setup()
185 nxt6000_writereg(state, VIT_BERTIME_2, 0x00); // BER Timer = 0x000200 * 256 = 131072 bits nxt6000_setup()
186 nxt6000_writereg(state, VIT_BERTIME_1, 0x02); // nxt6000_setup()
187 nxt6000_writereg(state, VIT_BERTIME_0, 0x00); // nxt6000_setup()
188 nxt6000_writereg(state, VIT_COR_INTEN, 0x98); // Enable BER interrupts nxt6000_setup()
189 nxt6000_writereg(state, VIT_COR_CTL, 0x82); // Enable BER measurement nxt6000_setup()
190 nxt6000_writereg(state, VIT_COR_CTL, VIT_COR_RESYNC | 0x02 ); nxt6000_setup()
191 nxt6000_writereg(state, OFDM_COR_CTL, (0x01 << 5) | (nxt6000_readreg(state, OFDM_COR_CTL) & 0x0F)); nxt6000_setup()
192 nxt6000_writereg(state, OFDM_COR_MODEGUARD, FORCEMODE8K | 0x02); nxt6000_setup()
193 nxt6000_writereg(state, OFDM_AGC_CTL, AGCLAST | INITIAL_AGC_BW); nxt6000_setup()
194 nxt6000_writereg(state, OFDM_ITB_FREQ_1, 0x06); nxt6000_setup()
195 nxt6000_writereg(state, OFDM_ITB_FREQ_2, 0x31); nxt6000_setup()
196 nxt6000_writereg(state, OFDM_CAS_CTL, (0x01 << 7) | (0x02 << 3) | 0x04); nxt6000_setup()
197 nxt6000_writereg(state, CAS_FREQ, 0xBB); /* CHECKME */ nxt6000_setup()
198 nxt6000_writereg(state, OFDM_SYR_CTL, 1 << 2); nxt6000_setup()
199 nxt6000_writereg(state, OFDM_PPM_CTL_1, PPM256); nxt6000_setup()
200 nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_1, 0x49); nxt6000_setup()
201 nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_2, 0x72); nxt6000_setup()
202 nxt6000_writereg(state, ANALOG_CONTROL_0, 1 << 5); nxt6000_setup()
203 nxt6000_writereg(state, EN_DMD_RACQ, (1 << 7) | (3 << 4) | 2); nxt6000_setup()
204 nxt6000_writereg(state, DIAG_CONFIG, TB_SET); nxt6000_setup()
207 nxt6000_writereg(state, SUB_DIAG_MODE_SEL, CLKINVERSION); nxt6000_setup()
209 nxt6000_writereg(state, SUB_DIAG_MODE_SEL, 0); nxt6000_setup()
211 nxt6000_writereg(state, TS_FORMAT, 0); nxt6000_setup()
513 nxt6000_writereg( state, VIT_COR_INTSTAT, 0x18 ); nxt6000_read_ber()
518 nxt6000_writereg( state, VIT_COR_INTSTAT, 0x18); // Clear BER Done interrupts nxt6000_read_ber()
545 return nxt6000_writereg(state, ENABLE_TUNER_IIC, 0x01); nxt6000_i2c_gate_ctrl()
547 return nxt6000_writereg(state, ENABLE_TUNER_IIC, 0x00); nxt6000_i2c_gate_ctrl()
|