/linux-4.4.14/arch/arm/mach-shmobile/ |
H A D | setup-rcar-gen2.c | 69 " mrc p15, 0, r1, c1, c1, 0\n" rcar_gen2_timer_init() 145 struct memory_reserve_config *mrc = data; rcar_gen2_scan_mem() local 171 if (size < mrc->reserved) rcar_gen2_scan_mem() 174 if (base < mrc->base) rcar_gen2_scan_mem() 178 mrc->base = base + size - mrc->reserved; rcar_gen2_scan_mem() 179 mrc->size = mrc->reserved; rcar_gen2_scan_mem() 189 struct memory_reserve_config mrc; rcar_gen2_reserve() local 192 memset(&mrc, 0, sizeof(mrc)); rcar_gen2_reserve() 193 mrc.reserved = SZ_256M; rcar_gen2_reserve() 195 of_scan_flat_dt(rcar_gen2_scan_mem, &mrc); rcar_gen2_reserve() 197 if (mrc.size && memblock_is_region_memory(mrc.base, mrc.size)) rcar_gen2_reserve() 198 dma_contiguous_reserve_area(mrc.size, mrc.base, 0, rcar_gen2_reserve()
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H A D | platsmp-apmu.c | 149 " mrc p15, 0, %0, c1, c0, 0\n" cpu_enter_lowpower_a15() 162 " mrc p15, 0, %0, c1, c0, 1\n" cpu_enter_lowpower_a15() 187 asm volatile("mrc p15, 0, %0, c1, c0, 0\n" cpu_leave_lowpower() 190 " mrc p15, 0, %0, c1, c0, 1\n" cpu_leave_lowpower()
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H A D | headsmp-scu.S | 30 mrc p15, 0, r1, c0, c0, 5 @ read MIPDR
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H A D | headsmp.S | 50 mrc p15, 0, r1, c0, c0, 5 @ r1 = MPIDR
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/linux-4.4.14/arch/arm/include/asm/ |
H A D | arch_timer.h | 54 asm volatile("mrc p15, 0, %0, c14, c2, 1" : "=r" (val)); arch_timer_reg_read_cp15() 57 asm volatile("mrc p15, 0, %0, c14, c2, 0" : "=r" (val)); arch_timer_reg_read_cp15() 63 asm volatile("mrc p15, 0, %0, c14, c3, 1" : "=r" (val)); arch_timer_reg_read_cp15() 66 asm volatile("mrc p15, 0, %0, c14, c3, 0" : "=r" (val)); arch_timer_reg_read_cp15() 77 asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (val)); arch_timer_get_cntfrq() 102 asm volatile("mrc p15, 0, %0, c14, c1, 0" : "=r" (cntkctl)); arch_timer_get_cntkctl()
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H A D | dcc.h | 18 asm volatile("mrc p14, 0, %0, c0, c1, 0 @ read comms ctrl reg" __dcc_getstatus() 28 asm volatile("mrc p14, 0, %0, c0, c5, 0 @ read comms data reg" __dcc_getchar()
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H A D | smp_scu.h | 21 asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (pa)); scu_a9_get_base()
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H A D | cp15.h | 57 asm("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc"); get_cr() 71 asm("mrc p15, 0, %0, c1, c0, 1 @ get AUXCR" : "=r" (val)); get_auxcr() 89 asm("mrc p15, 0, %0, c1, c0, 2 @ get copro access" get_copro_access()
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H A D | tls.h | 13 mrc p15, 0, \tmp2, c13, c0, 2 @ get the user r/w register 104 __asm__("mrc p15, 0, %0, c13, c0, 2" : "=r" (reg)); get_tpuser()
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H A D | percpu.h | 39 asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) __my_cpu_offset()
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H A D | arch_gicv3.h | 119 asm volatile("mrc " __stringify(ICC_IAR1) : "=r" (irqstat)); gic_read_iar() 149 asm volatile("mrc " __stringify(ICC_SRE) : "=r" (val)); gic_read_sre()
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H A D | hw_breakpoint.h | 106 asm volatile("mrc p14, 0, %0, " #N "," #M ", " #OP2 : "=r" (VAL));\
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H A D | cputype.h | 90 asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \ 98 * The memory clobber prevents gcc 4.5 from reordering the mrc before 105 asm("mrc p15, 0, %0, c0, " ext_reg \
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H A D | domain.h | 92 "mrc p15, 0, %0, c3, c0 @ get domain" get_domain()
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H A D | proc-fns.h | 138 __asm__("mrc p15, 0, %0, c2, c0, 0" \
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H A D | cacheflush.h | 467 "mrc p15, 0, r0, c1, c0, 0 @ get SCTLR \n\t" \ 472 "mrc p15, 0, r0, c1, c0, 1 @ get ACTLR \n\t" \
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H A D | assembler.h | 482 mrc p15, 0, \tmp, c3, c0, 0
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/linux-4.4.14/arch/arm/mach-spear/ |
H A D | hotplug.c | 29 " mrc p15, 0, %0, c1, c0, 1\n" cpu_enter_lowpower() 32 " mrc p15, 0, %0, c1, c0, 0\n" cpu_enter_lowpower() 44 asm volatile("mrc p15, 0, %0, c1, c0, 0\n" cpu_leave_lowpower() 47 " mrc p15, 0, %0, c1, c0, 1\n" cpu_leave_lowpower()
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H A D | headsmp.S | 24 mrc p15, 0, r0, c0, c0, 5 35 mrc p15, 0, r0, c1, c0, 1
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/linux-4.4.14/arch/arm/mach-realview/ |
H A D | hotplug.c | 28 " mrc p15, 0, %0, c1, c0, 1\n" cpu_enter_lowpower() 31 " mrc p15, 0, %0, c1, c0, 0\n" cpu_enter_lowpower() 43 asm volatile( "mrc p15, 0, %0, c1, c0, 0\n" cpu_leave_lowpower() 46 " mrc p15, 0, %0, c1, c0, 1\n" cpu_leave_lowpower()
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/linux-4.4.14/arch/arm/mach-vexpress/ |
H A D | hotplug.c | 28 " mrc p15, 0, %0, c1, c0, 1\n" cpu_enter_lowpower() 31 " mrc p15, 0, %0, c1, c0, 0\n" cpu_enter_lowpower() 44 "mrc p15, 0, %0, c1, c0, 0\n" cpu_leave_lowpower() 47 " mrc p15, 0, %0, c1, c0, 1\n" cpu_leave_lowpower()
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/linux-4.4.14/arch/arm/mm/ |
H A D | proc-v7.S | 33 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 55 mrc p15, 0, r1, c1, c0, 0 @ ctrl register 99 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID 100 mrc p15, 0, r5, c13, c0, 3 @ User r/o thread ID 103 mrc p15, 0, r6, c3, c0, 0 @ Domain ID 107 mrc p15, 0, r7, c2, c0, 1 @ TTB 1 109 mrc p15, 0, r11, c2, c0, 2 @ TTB control register 111 mrc p15, 0, r8, c1, c0, 0 @ Control register 112 mrc p15, 0, r9, c1, c0, 1 @ Auxiliary control register 113 mrc p15, 0, r10, c1, c0, 2 @ Co-processor access control 144 mrc p15, 0, r4, c1, c0, 1 @ Read Auxiliary control register 185 mrc p15, 0, r4, c15, c0, 1 @ Diagnostic register 186 mrc p15, 0, r5, c15, c0, 0 @ Power register 194 mrc p15, 0, r10, c15, c0, 1 @ Read Diagnostic register 197 mrc p15, 0, r10, c15, c0, 0 @ Read Power register 224 mrc p15, 1, r6, c15, c1, 0 @ save CP15 - extra features 225 mrc p15, 1, r7, c15, c2, 0 @ save CP15 - Aux Func Modes Ctrl 0 226 mrc p15, 1, r8, c15, c1, 2 @ save CP15 - Aux Debug Modes Ctrl 2 227 mrc p15, 1, r9, c15, c1, 1 @ save CP15 - Aux Debug Modes Ctrl 1 228 mrc p15, 0, r10, c9, c14, 0 @ save CP15 - PMC 282 ALT_SMP(mrc p15, 0, r0, c1, c0, 1) 389 mrc p15, 1, r0, c15, c1, 1 396 mrc p15, 1, r0, c15, c1, 2 402 mrc p15, 1, r0, c15, c2, 0 411 mrc p15, 1, r0, c15, c1, 0 460 mrc p15, 0, r0, c0, c1, 0 @ read ID_PFR0 for ThumbEE 466 mrc p14, 6, r0, c0, c0, 0 @ load TEECR 478 mrc p15, 0, r0, c1, c0, 0 @ read control register
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H A D | proc-v6.S | 42 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 60 mrc p15, 0, r1, c1, c0, 0 @ ctrl register 109 mrc p15, 0, r2, c13, c0, 1 @ read current context ID 142 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID 144 mrc p15, 0, r5, c3, c0, 0 @ Domain ID 145 mrc p15, 0, r6, c2, c0, 1 @ Translation table base 1 147 mrc p15, 0, r7, c1, c0, 1 @ auxiliary control register 148 mrc p15, 0, r8, c1, c0, 2 @ co-processor access control 149 mrc p15, 0, r9, c1, c0, 0 @ control register 200 ALT_SMP(mrc p15, 0, r0, c1, c0, 1) @ Enable SMP/nAMP mode 225 mrc p15, 0, r0, c1, c0, 0 @ read control register 237 mrc p15, 0, r5, c0, c0, 0 @ get processor id
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H A D | proc-sa1100.S | 57 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 81 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 178 mrc p15, 0, r4, c3, c0, 0 @ domain ID 179 mrc p15, 0, r5, c13, c0, 0 @ PID 180 mrc p15, 0, r6, c1, c0, 0 @ control reg 211 mrc p15, 0, r0, c1, c0 @ get control register v4
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H A D | proc-arm926.S | 64 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 88 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 104 mrc p15, 0, r1, c1, c0, 0 @ Read control register 148 1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate 375 1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate 408 mrc p15, 0, r4, c13, c0, 0 @ PID 409 mrc p15, 0, r5, c3, c0, 0 @ Domain ID 410 mrc p15, 0, r6, c1, c0, 0 @ Control register 445 mrc p15, 0, r0, c1, c0 @ get control register v4
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H A D | proc-mohawk.S | 54 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 78 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 356 mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode 357 mrc p15, 0, r5, c15, c1, 0 @ CP access reg 358 mrc p15, 0, r6, c13, c0, 0 @ PID 359 mrc p15, 0, r7, c3, c0, 0 @ domain ID 360 mrc p15, 0, r8, c1, c0, 1 @ auxiliary control reg 361 mrc p15, 0, r9, c1, c0, 0 @ control reg 400 mrc p15, 0, r0, c1, c0 @ get control register
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H A D | cache-tauros2.c | 119 "mrc p15, 0, %0, c1, c0, 0\n\t" tauros2_disable() 129 "mrc p15, 0, %0, c1, c0, 0\n\t" tauros2_resume() 140 __asm__("mrc p15, 1, %0, c15, c1, 0" : "=r" (u)); read_extra_features() 159 __asm__("mrc p15, 0, %0, c0, c1, 7\n" : "=r" (mmfr3)); read_mmfr3() 168 __asm__("mrc p15, 0, %0, c1, c0, 1\n" : "=r" (actlr)); read_actlr()
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H A D | proc-arm740.S | 41 mrc p15, 0, r0, c1, c0, 0 56 mrc p15, 0, ip, c1, c0, 0 @ get ctrl register 113 mrc p15, 0, r0, c1, c0 @ get control register
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H A D | proc-sa110.S | 49 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 73 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 173 mrc p15, 0, r0, c1, c0 @ get control register v4
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H A D | proc-xsc3.S | 59 mrc p15, 0, \rd, c2, c0, 0 @ arbitrary read of cp15 92 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 112 mrc p15, 0, r1, c1, c0, 0 @ ctrl register 419 mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode 420 mrc p15, 0, r5, c15, c1, 0 @ CP access reg 421 mrc p15, 0, r6, c13, c0, 0 @ PID 422 mrc p15, 0, r7, c3, c0, 0 @ domain ID 423 mrc p15, 0, r8, c1, c0, 1 @ auxiliary control reg 424 mrc p15, 0, r9, c1, c0, 0 @ control reg 463 mrc p15, 0, r0, c1, c0, 1 @ get auxiliary control reg 472 mrc p15, 1, r0, c0, c0, 1 @ get L2 present information 477 mrc p15, 0, r0, c1, c0, 0 @ get control register
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H A D | proc-xscale.S | 72 mrc p15, 0, \rd, c2, c0, 0 @ arbitrary read of cp15 78 mrc p15, 0, \rd, c2, c0, 0 @ arbitrary read of cp15 118 mrc p15, 0, r1, c1, c0, 1 127 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 151 mrc p15, 0, r1, c1, c0, 0 @ ctrl register 534 mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode 535 mrc p15, 0, r5, c15, c1, 0 @ CP access reg 536 mrc p15, 0, r6, c13, c0, 0 @ PID 537 mrc p15, 0, r7, c3, c0, 0 @ domain ID 538 mrc p15, 0, r8, c1, c0, 1 @ auxiliary control reg 539 mrc p15, 0, r9, c1, c0, 0 @ control reg 572 mrc p15, 0, r0, c1, c0, 0 @ get control register
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H A D | cache-xsc3l2.c | 38 __asm__("mrc p15, 1, %0, c0, c0, 1" : "=r" (l2ctype)); xsc3_l2_present() 58 __asm__("mrc p15, 1, %0, c0, c0, 1" : "=r" (l2ctype)); xsc3_l2_inv_all() 168 __asm__("mrc p15, 1, %0, c0, c0, 1" : "=r" (l2ctype)); xsc3_l2_flush_all()
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H A D | proc-arm720.S | 57 mrc p15, 0, r0, c1, c0, 0 111 mrc p15, 0, ip, c1, c0, 0 @ get ctrl register 126 mrc p15, 0, r0, c1, c0 @ get control register 156 mrc p15, 0, r0, c1, c0 @ get control register
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H A D | proc-arm1026.S | 71 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 95 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 146 1: mrc p15, 0, r15, c7, c14, 3 @ test, clean, invalidate 371 1: mrc p15, 0, r15, c7, c14, 3 @ test, clean, invalidate 414 mrc p15, 0, r0, c1, c0 @ get control register v4
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H A D | proc-arm920.S | 72 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 96 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 393 mrc p15, 0, r4, c13, c0, 0 @ PID 394 mrc p15, 0, r5, c3, c0, 0 @ Domain ID 395 mrc p15, 0, r6, c1, c0, 0 @ Control register 423 mrc p15, 0, r0, c1, c0 @ get control register v4
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H A D | pv-fixup-asm.S | 25 mrc p15, 0, r8, c1, c0, 0 @ read control reg
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H A D | proc-fa526.S | 41 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 68 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 160 mrc p15, 0, r0, c1, c0 @ get control register v4
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H A D | cache-v7.S | 37 mrc p15, 1, r0, c0, c0, 0 92 mrc p15, 1, r0, c0, c0, 1 @ read clidr, r0 = clidr 98 ALT_SMP(mrc p15, 0, r2, c0, c0, 0) @ read main ID register 120 mrc p15, 1, r0, c0, c0, 1 @ read clidr 137 mrc p15, 1, r1, c0, c0, 0 @ read the new csidr
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H A D | proc-feroceon.S | 60 mrc p15, 0, r0, c0, c0, 1 @ read cache type register 85 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 109 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 523 mrc p15, 0, r4, c13, c0, 0 @ PID 524 mrc p15, 0, r5, c3, c0, 0 @ Domain ID 525 mrc p15, 0, r6, c1, c0, 0 @ Control register 554 mrc p15, 0, r0, c1, c0 @ get control register v4
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H A D | proc-arm1022.S | 71 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 95 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 420 mrc p15, 0, r0, c1, c0 @ get control register v4
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H A D | proc-arm940.S | 40 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 57 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 326 mrc p15, 0, r0, c1, c0 @ get control register
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H A D | proc-arm946.S | 47 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 64 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 379 mrc p15, 0, r0, c1, c0 @ get control register
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H A D | proc-arm925.S | 95 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 128 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 142 mrc p15, 0, r1, c1, c0, 0 @ Read control register 463 mrc p15, 0, r0, c1, c0 @ get control register v4
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H A D | abort-lv4t.S | 20 mrc p15, 0, r1, c5, c0, 0 @ get FSR 21 mrc p15, 0, r0, c6, c0, 0 @ get FAR
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H A D | context.c | 97 " mrc p15, 0, %0, c2, c0, 1 @ read TTBR1\n" cpu_set_reserved_ttbr0() 117 " mrc p15, 0, %0, c13, c0, 1\n" contextidr_notifier()
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H A D | proc-arm1020.S | 80 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 104 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 455 mrc p15, 0, r0, c1, c0 @ get control register v4
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H A D | proc-arm1020e.S | 80 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 104 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 436 mrc p15, 0, r0, c1, c0 @ get control register v4
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H A D | proc-arm922.S | 74 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 98 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 401 mrc p15, 0, r0, c1, c0 @ get control register v4
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H A D | proc-v7-2level.S | 55 mrc p15, 0, r2, c13, c0, 1 @ read current context ID
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H A D | proc-v7-3level.S | 132 mrc p15, 0, \tmp, c2, c0, 2 @ TTB control egister
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H A D | nommu.c | 57 asm("mrc p15, 0, %0, c6, c1, 0" : "=r" (v)); drbar_read() 83 asm("mrc p15, 0, %0, c6, c1, 1" : "=r" (v)); irbar_read()
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H A D | cache-feroceon-l2.c | 296 __asm__("mrc p15, 1, %0, c15, c1, 0" : "=r" (u)); read_extra_features()
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H A D | mmu.c | 1501 asm("mrc p15, 0, %0, c2, c0, 2" : "=r" (ttbcr)); early_paging_init()
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H A D | cache-l2x0.c | 1423 asm volatile("mrc p15, 1, %0, c15, c2, 0" : "=r" (u)); aurora_enable_no_outer()
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/linux-4.4.14/arch/arm/kvm/ |
H A D | init.S | 79 mrc p15, 4, r0, c2, c0, 2 @ HTCR 82 mrc p15, 0, r1, c2, c0, 2 @ TTBCR 87 mrc p15, 4, r1, c2, c1, 2 @ VTCR 97 mrc p15, 0, r0, c10, c2, 0 99 mrc p15, 0, r0, c10, c2, 1 115 mrc p15, 4, r0, c1, c0, 0 @ HSCR 118 mrc p15, 0, r1, c1, c0, 0 @ SCTLR
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H A D | interrupts_head.S | 251 mrc p15, 0, r2, c1, c0, 0 @ SCTLR 252 mrc p15, 0, r3, c1, c0, 2 @ CPACR 253 mrc p15, 0, r4, c2, c0, 2 @ TTBCR 254 mrc p15, 0, r5, c3, c0, 0 @ DACR 257 mrc p15, 0, r10, c10, c2, 0 @ PRRR 258 mrc p15, 0, r11, c10, c2, 1 @ NMRR 259 mrc p15, 2, r12, c0, c0, 0 @ CSSELR 277 mrc p15, 0, r2, c13, c0, 1 @ CID 278 mrc p15, 0, r3, c13, c0, 2 @ TID_URW 279 mrc p15, 0, r4, c13, c0, 3 @ TID_URO 280 mrc p15, 0, r5, c13, c0, 4 @ TID_PRIV 281 mrc p15, 0, r6, c5, c0, 0 @ DFSR 282 mrc p15, 0, r7, c5, c0, 1 @ IFSR 283 mrc p15, 0, r8, c5, c1, 0 @ ADFSR 284 mrc p15, 0, r9, c5, c1, 1 @ AIFSR 285 mrc p15, 0, r10, c6, c0, 0 @ DFAR 286 mrc p15, 0, r11, c6, c0, 2 @ IFAR 287 mrc p15, 0, r12, c12, c0, 0 @ VBAR 305 mrc p15, 0, r2, c14, c1, 0 @ CNTKCTL 307 mrc p15, 0, r6, c10, c3, 0 @ AMAIR0 308 mrc p15, 0, r7, c10, c3, 1 @ AMAIR1 516 mrc p15, 0, r2, c14, c3, 1 @ CNTV_CTL 535 mrc p15, 4, r2, c14, c1, 0 @ CNTHCTL 550 mrc p15, 4, r2, c14, c1, 0 @ CNTHCTL 582 mrc p15, 4, r2, c1, c1, 3 600 mrc p15, 4, r2, c1, c1, 2 624 mrc p15, 4, r2, c1, c1, 1 647 mrc p15, 4, vcpu, c13, c0, 2 @ HTPIDR
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H A D | interrupts.S | 195 mrc p15, 0, r2, c0, c0, 0 199 mrc p15, 0, r2, c0, c0, 5 289 mrc p15, 4, r2, c5, c2, 0 @ HSR 290 mrc p15, 4, r1, c6, c0, 0 @ HDFAR 295 mrc p15, 4, r2, c5, c2, 0 @ HSR 296 mrc p15, 4, r1, c6, c0, 2 @ HIFAR 362 mrc p15, 4, r1, c5, c2, 0 @ HSR 420 mrc p15, 4, r2, c6, c0, 0 @ HDFAR 438 mrc p15, 4, r1, c5, c2, 0 @ HSR
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H A D | coproc.c | 150 asm volatile("mrc p15, 1, %0, c9, c0, 2\n" : "=r" (l2ctlr)); reset_l2ctlr() 167 asm volatile("mrc p15, 0, %0, c1, c0, 1\n" : "=r" (actlr)); reset_actlr() 501 * kvm_handle_cp15_32 -- handles a mrc/mcr trap on a guest CP15 access 604 /* Unfortunately, there's no register-argument for mrc, so generate. */ 611 asm volatile("mrc p15, " __stringify(op1) \ 784 asm volatile("mrc p15, 1, %0, c0, c0, 0" : "=r" (ccsidr)); get_ccsidr() 1230 asm volatile("mrc p15, 1, %0, c0, c0, 1" : "=r" (cache_levels)); kvm_coproc_table_init()
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H A D | trace.h | 161 (__entry->is_write) ? "mcr" : "mrc",
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/linux-4.4.14/arch/arm/mach-mvebu/ |
H A D | pmsu_ll.S | 17 mrc p15, 4, r1, c15, c0 @ get SCU base address 19 mrc 15, 0, r0, cr0, cr0, 5 @ get the CPU ID 38 mrc p15, 0, r1, c1, c0, 0
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H A D | coherency_ll.S | 32 mrc p15, 0, r1, c1, c0, 0 69 mrc 15, 0, r3, cr0, cr0, 5
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H A D | pmsu.c | 298 "mrc p15, 0, r0, c1, c0, 0 \n\t" armada_370_xp_pmsu_idle_enter()
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/linux-4.4.14/arch/arm/kernel/ |
H A D | pj4-cp0.c | 58 "mrc p15, 0, %0, c1, c0, 2\n\t" pj4_cp_access_read() 69 "mrc p15, 0, %0, c1, c0, 2\n\t" pj4_cp_access_write() 89 __asm__ __volatile__ ("mrc p1, 0, %0, c0, c0, 0\n" : "=r" (wcid)); pj4_get_iwmmxt_version()
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H A D | iwmmxt.S | 76 XSC(mrc p15, 0, r2, c15, c1, 0) 77 PJ4(mrc p15, 0, r2, c1, c0, 2) 96 mrc p15, 0, r2, c2, c0, 0 213 XSC(mrc p15, 0, r4, c15, c1, 0) 216 PJ4(mrc p15, 0, r4, c1, c0, 2) 222 mrc p15, 0, r2, c2, c0, 0 232 mrc p15, 0, r2, c2, c0, 0 325 XSC(mrc p15, 0, r1, c15, c1, 0) 326 PJ4(mrc p15, 0, r1, c1, c0, 2) 344 mrc p15, 0, r1, c2, c0, 0
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H A D | perf_event_xscale.c | 108 asm volatile("mrc p14, 0, %0, c0, c0, 0" : "=r" (val)); xscale1pmu_read_pmnc() 327 asm volatile("mrc p14, 0, %0, c1, c0, 0" : "=r" (val)); xscale1pmu_read_counter() 330 asm volatile("mrc p14, 0, %0, c2, c0, 0" : "=r" (val)); xscale1pmu_read_counter() 333 asm volatile("mrc p14, 0, %0, c3, c0, 0" : "=r" (val)); xscale1pmu_read_counter() 406 asm volatile("mrc p14, 0, %0, c0, c1, 0" : "=r" (val)); xscale2pmu_read_pmnc() 423 asm volatile("mrc p14, 0, %0, c5, c1, 0" : "=r" (val)); xscale2pmu_read_overflow_flags() 437 asm volatile("mrc p14, 0, %0, c8, c1, 0" : "=r" (val)); xscale2pmu_read_event_select() 451 asm volatile("mrc p14, 0, %0, c4, c1, 0" : "=r" (val)); xscale2pmu_read_int_enable() 691 asm volatile("mrc p14, 0, %0, c1, c1, 0" : "=r" (val)); xscale2pmu_read_counter() 694 asm volatile("mrc p14, 0, %0, c0, c2, 0" : "=r" (val)); xscale2pmu_read_counter() 697 asm volatile("mrc p14, 0, %0, c1, c2, 0" : "=r" (val)); xscale2pmu_read_counter() 700 asm volatile("mrc p14, 0, %0, c2, c2, 0" : "=r" (val)); xscale2pmu_read_counter() 703 asm volatile("mrc p14, 0, %0, c3, c2, 0" : "=r" (val)); xscale2pmu_read_counter()
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H A D | tcm.c | 130 asm("mrc p15, 0, %0, c9, c1, 0" setup_tcm_bank() 133 asm("mrc p15, 0, %0, c9, c1, 1" setup_tcm_bank() 189 * c0370628: ee196f11 mrc 15, 0, r6, cr9, cr1, {0} 190 * c0370674: ee196f31 mrc 15, 0, r6, cr9, cr1, {1} 206 * mrc p15, 0, XX, c9, c1, 0 207 * mrc p15, 0, XX, c9, c1, 1 219 * 1110 1110 0001 1001 ???? 1111 0001 0001 mrc p15, 0, XX, c9, c1, 0 220 * 1110 1110 0001 1001 ???? 1111 0011 0001 mrc p15, 0, XX, c9, c1, 1
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H A D | head-nommu.S | 58 mrc p15, 0, r9, c0, c0 @ get processor id 103 mrc p15, 0, r9, c0, c0 @ get processor id 195 mrc p15, 0, r0, c0, c1, 4 @ Read ID_MMFR0 202 mrc p15, 0, r0, c0, c0, 4 @ MPUIR 247 mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR
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H A D | xscale-cp0.c | 95 "mrc p15, 0, %0, c15, c1, 0\n\t" xscale_cp_access_read() 107 "mrc p15, 0, %0, c15, c1, 0\n\t" xscale_cp_access_write()
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H A D | hyp-stub.S | 140 mrc p15, 4, r7, c1, c1, 1 @ HDCR 146 mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1 151 mrc p15, 4, r7, c14, c1, 0 @ CNTHCTL 158 mrc p15, 0, r7, c14, c3, 1 @ CNTV_CTL
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H A D | thumbee.c | 33 asm("mrc p14, 6, %0, c1, c0, 0\n" : "=r" (v)); teehbr_read()
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H A D | perf_event_v7.c | 606 asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r"(val)); armv7_pmnc_read() 651 asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (value)); armv7pmu_read_counter() 654 asm volatile("mrc p15, 0, %0, c9, c13, 2" : "=r" (value)); armv7pmu_read_counter() 717 asm volatile("mrc p15, 0, %0, c9, c12, 3" : "=r" (val)); armv7_pmnc_getreset_flags() 734 asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (val)); armv7_pmnc_dump_regs() 737 asm volatile("mrc p15, 0, %0, c9, c12, 1" : "=r" (val)); armv7_pmnc_dump_regs() 740 asm volatile("mrc p15, 0, %0, c9, c14, 1" : "=r" (val)); armv7_pmnc_dump_regs() 743 asm volatile("mrc p15, 0, %0, c9, c12, 3" : "=r" (val)); armv7_pmnc_dump_regs() 746 asm volatile("mrc p15, 0, %0, c9, c12, 5" : "=r" (val)); armv7_pmnc_dump_regs() 749 asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (val)); armv7_pmnc_dump_regs() 755 asm volatile("mrc p15, 0, %0, c9, c13, 2" : "=r" (val)); armv7_pmnc_dump_regs() 758 asm volatile("mrc p15, 0, %0, c9, c13, 1" : "=r" (val)); armv7_pmnc_dump_regs() 1191 asm volatile("mrc p15, 1, %0, c9, c15, 0" : "=r" (val)); krait_read_pmresrn() 1194 asm volatile("mrc p15, 1, %0, c9, c15, 1" : "=r" (val)); krait_read_pmresrn() 1197 asm volatile("mrc p15, 1, %0, c9, c15, 2" : "=r" (val)); krait_read_pmresrn() 1226 asm volatile("mrc p10, 7, %0, c11, c0, 0" : "=r" (val)); venum_read_pmresr() 1569 asm volatile("mrc p15, 0, %0, c15, c0, 0" : "=r" (val)); scorpion_read_pmresrn() 1572 asm volatile("mrc p15, 1, %0, c15, c0, 0" : "=r" (val)); scorpion_read_pmresrn() 1575 asm volatile("mrc p15, 2, %0, c15, c0, 0" : "=r" (val)); scorpion_read_pmresrn() 1578 asm volatile("mrc p15, 3, %0, c15, c2, 0" : "=r" (val)); scorpion_read_pmresrn()
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H A D | debug.S | 30 mrc p15, 0, \rx, c1, c0
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H A D | perf_event_v6.c | 182 asm volatile("mrc p15, 0, %0, c15, c12, 0" : "=r"(val)); armv6_pmcr_read() 242 asm volatile("mrc p15, 0, %0, c15, c12, 1" : "=r"(value)); armv6pmu_read_counter() 244 asm volatile("mrc p15, 0, %0, c15, c12, 2" : "=r"(value)); armv6pmu_read_counter() 246 asm volatile("mrc p15, 0, %0, c15, c12, 3" : "=r"(value)); armv6pmu_read_counter()
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H A D | sleep.S | 106 mrc p15, 0, r0, c0, c0, 0 @ read id reg 138 ALT_SMP(mrc p15, 0, r0, c0, c0, 5)
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H A D | process.c | 170 asm("mrc p15, 0, %0, c2, c0\n\t" __show_regs() 176 asm("mrc p15, 0, %0, c1, c0\n" : "=r" (ctrl)); __show_regs()
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H A D | head.S | 94 mrc p15, 0, r9, c0, c0 @ get processor id 101 mrc p15, 0, r3, c0, c1, 4 @ read ID_MMFR0 387 mrc p15, 0, r9, c0, c0 @ get processor id 494 mrc p15, 0, r3, c0, c0, 0 @ read id reg 519 mrc p15, 0, r0, c0, c0, 5 @ read MPIDR 535 mrc p15, 4, r0, c15, c0 @ get SCU base address
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H A D | entry-armv.S | 383 ATRAP( mrc p15, 0, r7, c1, c0, 0) 786 mrc p15, 0, r6, c3, c0, 0 @ Get domain register 998 mrc p15, 0, r0, c13, c0, 3 @ 0xffff0fe8 hardware TLS code
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H A D | entry-header.S | 48 mrc p15, 0, \rtmp2, c1, c0, 0
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H A D | setup.c | 295 asm("mrc p15, 1, %0, c0, c0, 0 @ read CCSIDR" cpu_has_aliasing_icache()
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/linux-4.4.14/arch/arm/mach-iop13xx/include/mach/ |
H A D | time.h | 74 asm volatile("mrc p6, 0, %0, c0, c9, 0" : "=r" (val)); read_tmr0() 91 asm volatile("mrc p6, 0, %0, c2, c9, 0" : "=r" (val)); read_tcr0() 103 asm volatile("mrc p6, 0, %0, c3, c9, 0" : "=r" (val)); read_tcr1()
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H A D | irqs.h | 12 asm volatile("mrc p6, 0, %0, c0, c3, 0":"=r" (val)); read_intpnd_0() 21 asm volatile("mrc p6, 0, %0, c1, c3, 0":"=r" (val)); read_intpnd_1() 30 asm volatile("mrc p6, 0, %0, c2, c3, 0":"=r" (val)); read_intpnd_2() 39 asm volatile("mrc p6, 0, %0, c3, c3, 0":"=r" (val)); read_intpnd_3()
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H A D | iop13xx.h | 23 asm volatile("mrc p6, 0, %0, c0, c0, 0":"=r" (id)); iop13xx_cpu_id() 31 asm volatile("mrc p6, 0, %0, c7, c9, 0":"=r" (val)); read_wdtcr() 43 asm volatile("mrc p6, 0, %0, c8, c9, 0":"=r" (val)); read_wdtsr() 55 asm volatile("mrc p6, 0, %0, c0, c1, 0":"=r" (val)); read_rcsr()
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/linux-4.4.14/arch/arm/mach-iop13xx/ |
H A D | msi.c | 33 asm volatile("mrc p6, 0, %0, c8, c1, 0":"=r" (val)); read_imipr_0() 46 asm volatile("mrc p6, 0, %0, c9, c1, 0":"=r" (val)); read_imipr_1() 59 asm volatile("mrc p6, 0, %0, c10, c1, 0":"=r" (val)); read_imipr_2() 72 asm volatile("mrc p6, 0, %0, c11, c1, 0":"=r" (val)); read_imipr_3()
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H A D | irq.c | 35 asm volatile("mrc p6, 0, %0, c0, c4, 0":"=r" (val)); read_intctl_0() 48 asm volatile("mrc p6, 0, %0, c1, c4, 0":"=r" (val)); read_intctl_1() 61 asm volatile("mrc p6, 0, %0, c2, c4, 0":"=r" (val)); read_intctl_2() 74 asm volatile("mrc p6, 0, %0, c3, c4, 0":"=r" (val)); read_intctl_3()
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/linux-4.4.14/arch/arm/boot/compressed/ |
H A D | head-sa1100.S | 26 mrc p15, 0, r0, c1, c0, 0 @ read control reg 44 mrc p15, 0, r0, c1, c0, 0 @ read control reg
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H A D | misc.c | 42 asm volatile ("mrc p14, 0, %0, c0, c1, 0" : "=r" (status)); icedcc_putc() 59 asm volatile ("mrc p14, 0, %0, c14, c0, 0" : "=r" (status)); icedcc_putc() 75 asm volatile ("mrc p14, 0, %0, c0, c0, 0" : "=r" (status)); icedcc_putc()
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H A D | head-xscale.S | 30 mrc p15, 0, r0, c1, c0, 0 @ read control reg
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H A D | head.S | 93 mrc p15, 0, r0, c1, c0 634 mrc p15, 0, r0, c1, c0, 0 @ read control reg 663 mrc p15, 0, r0, c1, c0, 0 @ read control reg 724 mrc p15, 0, r0, c1, c0, 0 @ read SCTLR 744 mrc p15, 0, r0, c1, c0, 0 @ read control reg 757 mrc p15, 0, r11, c0, c1, 4 @ read ID_MMFR0 766 mrc p15, 0, r0, c1, c0, 0 @ read control reg 786 mrc p15, 0, r0, c1, c0, 0 @ and read it back 799 mrc p15, 0, r0, c1, c0, 0 @ read control reg 817 mrc p15, 0, r0, c1, c0, 0 @ and read it back to 839 mrc p15, 0, r9, c0, c0 @ get processor ID 1046 mrc p15, 0, r0, c1, c0 1056 mrc p15, 0, r0, c1, c0 1065 mrc p15, 0, r0, c1, c0 1075 mrc p15, 0, r0, c1, c0 1146 mrc p15, 0, r10, c0, c1, 5 @ read ID_MMFR1 1155 mrc p15, 1, r0, c0, c0, 1 @ read clidr 1168 mrc p15, 1, r1, c0, c0, 0 @ read the new csidr 1208 1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate D cache 1219 mrc p15, 0, r3, c0, c0, 1 @ read cache type
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H A D | head-sharpsl.S | 35 mrc p15, 0, r4, c0, c0 @ Get Processor ID
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/linux-4.4.14/arch/arm/mach-uniphier/ |
H A D | headsmp.S | 21 mrc p15, 0, r0, c0, c0, 5 @ MPIDR (Multiprocessor Affinity Reg) 25 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
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/linux-4.4.14/arch/arm/mach-imx/ |
H A D | hotplug.c | 30 " mrc p15, 0, %0, c1, c0, 1\n" cpu_enter_lowpower() 33 " mrc p15, 0, %0, c1, c0, 0\n" cpu_enter_lowpower()
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H A D | platsmp.c | 40 asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); imx_scu_map_io() 87 asm("mrc p15, 0, %0, c15, c0, 1" : "=r" (g_diag_reg) : : "cc"); imx_smp_prepare_cpus()
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H A D | mm-imx3.c | 45 "mrc p15, 0, %0, c1, c0, 0\n" imx3_idle() 61 "mrc p15, 0, %0, c1, c0, 0\n" imx3_idle()
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/linux-4.4.14/arch/arm/plat-versatile/ |
H A D | headsmp.S | 22 mrc p15, 0, r0, c0, c0, 5
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/linux-4.4.14/arch/arm/mach-omap2/ |
H A D | omap-headsmp.S | 38 mrc p15, 0, r4, c0, c0, 5 54 mrc p15, 0, r4, c0, c0, 5 76 mrc p15, 0, r4, c0, c0, 5 93 mrc p15, 0, r4, c0, c0, 5
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H A D | sleep44xx.S | 88 mrc p15, 0, r0, c1, c0, 0 113 mrc p15, 0, r0, c0, c0, 5 @ Read MPIDR 124 mrc p15, 0, r0, c0, c0, 5 @ Read MPIDR 131 mrc p15, 0, r0, c1, c1, 2 @ Read NSACR data 151 mrc p15, 0, r5, c0, c0, 5 @ Read MPIDR 194 mrc p15, 0, r0, c1, c0, 0 206 mrc p15, 0, r0, c1, c0, 1 258 mrc p15, 0, r0, c0, c0, 5 275 mrc p15, 0, r0, c1, c0, 1
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H A D | omap-secure.c | 129 asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr)); rx51_secure_update_aux_cr()
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H A D | sleep34xx.S | 201 mrc p15, 0, r0, c1, c0, 0 334 mrc p15, 0, r0, c1, c0, 0 430 mrc p15, 0, r0, c1, c0, 1 503 mrc p15, 0, r1, c1, c0, 1
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H A D | pm34xx.c | 172 asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (val)); omap34xx_save_context() 177 asm("mrc p15, 1, %0, c9, c0, 2" : "=r" (val)); omap34xx_save_context()
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H A D | sram242x.S | 151 mov r3, #0x0 @ clear for mrc call
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H A D | sram243x.S | 151 mov r3, #0x0 @ clear for mrc call
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/linux-4.4.14/arch/arm/mach-prima2/ |
H A D | headsmp.S | 18 mrc p15, 0, r0, c0, c0, 5
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/linux-4.4.14/arch/arm/mach-sti/ |
H A D | headsmp.S | 25 mrc p15, 0, r0, c0, c0, 5
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/linux-4.4.14/arch/arm/mach-tegra/ |
H A D | sleep.S | 53 mrc p15, 0, r2, c1, c0, 0 77 mrc p15, 0, r0, c0, c0, 5 82 mrc p15, 0x1, r0, c9, c0, 2 128 mrc p15, 0, r3, c1, c0, 0
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H A D | sleep.h | 81 mrc p15, 0, \rd, c0, c0, 5 93 mrc p15, 0, \tmp1, c0, c0, 0 101 mrc p15, 0, \tmp1, c1, c0, 1 @ ACTLR
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H A D | reset-handler.S | 130 mrc p15, 0, r0, c1, c0, 0 @ read system control register 133 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register 146 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register 154 mrc p15, 0, r10, c0, c0, 5 @ MPIDR
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H A D | sleep-tegra20.S | 257 mrc p15, 0, r11, c1, c0, 1 @ save actlr before exiting coherency 290 mrc p15, 0, r10, c1, c0, 0
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/linux-4.4.14/arch/arm/include/debug/ |
H A D | exynos.S | 24 mrc p15, 0, \tmp, c0, c0, 0
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H A D | sa1100.S | 22 mrc p15, 0, \rp, c1, c0
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H A D | vexpress.S | 33 mrc p15, 0, \rp, c0, c0, 0
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/linux-4.4.14/arch/arm/mach-exynos/ |
H A D | headsmp.S | 21 mrc p15, 0, r0, c0, c0, 5
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H A D | sleep.S | 45 mrc p15, 0, r0, c0, c0, 0 58 mrc p15, 0, r0, c0, c0, 0
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H A D | firmware.c | 34 asm ("mrc p15, 0, %0, c15, c0, 0\n" exynos_save_cp15() 35 "mrc p15, 0, %1, c15, c0, 1\n" exynos_save_cp15()
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H A D | mcpm-exynos.c | 45 "mrc p15, 0, r0, c1, c0, 0 @ get SCTLR\n\t" \ 50 "mrc p15, 0, r0, c1, c0, 1 @ get ACTLR\n\t" \
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H A D | pm.c | 63 asm ("mrc p15, 0, %0, c15, c0, 0" exynos_cpu_save_register() 69 asm ("mrc p15, 0, %0, c15, c0, 1" exynos_cpu_save_register()
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H A D | platsmp.c | 43 "mrc p15, 0, %0, c1, c0, 0\n" cpu_leave_lowpower() 46 " mrc p15, 0, %0, c1, c0, 1\n" cpu_leave_lowpower()
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/linux-4.4.14/arch/arm/mach-socfpga/ |
H A D | self-refresh.S | 60 mrc p15, 0, r2, c15, c0, 0 127 mrc p15, 0, r2, c15, c0, 0
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/linux-4.4.14/arch/arm/mach-zx/ |
H A D | platsmp.c | 138 " mrc p15, 0, %0, c1, c0, 1\n" cpu_enter_lowpower() 141 " mrc p15, 0, %0, c1, c0, 0\n" cpu_enter_lowpower()
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/linux-4.4.14/drivers/clk/pxa/ |
H A D | clk-pxa27x.c | 156 asm("mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); clk_pxa27x_cpll_get_rate() 228 asm("mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); clk_pxa27x_core_get_rate() 251 asm("mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); clk_pxa27x_core_get_parent() 291 asm("mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); clk_pxa27x_system_bus_get_rate()
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H A D | clk-pxa3xx.c | 231 __asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg)); clk_pxa3xx_core_get_parent() 249 __asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg)); clk_pxa3xx_run_get_rate() 266 __asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg)); clk_pxa3xx_cpll_get_rate()
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H A D | clk-pxa25x.c | 148 asm("mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); clk_pxa25x_core_get_parent() 180 asm("mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); clk_pxa25x_cpll_get_rate()
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/linux-4.4.14/arch/arm/plat-iop/ |
H A D | cp6.c | 29 "mrc p15, 0, %0, c15, c1, 0\n\t" cp6_trap()
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/linux-4.4.14/arch/arm/mach-rockchip/ |
H A D | sleep.S | 30 mrc p15, 0, r1, c0, c0, 5
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H A D | platsmp.c | 312 asm ("mrc p15, 1, %0, c9, c0, 2\n" : "=r" (l2ctlr)); rockchip_smp_prepare_cpus()
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H A D | pm.c | 58 asm("mrc p15, 1, %0, c9, c0, 2" : "=r" (l2ctlr)); rk3288_l2_config()
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/linux-4.4.14/arch/arm/mach-zynq/ |
H A D | common.h | 43 asm volatile ("mrc p15, 0, r12, c15, c0, 0\n" zynq_core_pm_init()
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/linux-4.4.14/arch/arm/mach-hisi/ |
H A D | hotplug.c | 253 " mrc p15, 0, %0, c1, c0, 1\n" cpu_enter_lowpower() 256 " mrc p15, 0, %0, c1, c0, 0\n" cpu_enter_lowpower()
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/linux-4.4.14/arch/unicore32/kernel/ |
H A D | debug-macro.S | 48 mrc p0, #0, \rx, c1, c0
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/linux-4.4.14/arch/arm/vfp/ |
H A D | vfpinstr.h | 76 asm("mrc p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmrx %0, " #_vfp_ \
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H A D | vfphw.S | 265 1: mrc p10, 0, r0, c\dr, c0, 0 @ fmrs r0, s0 268 1: mrc p10, 0, r0, c\dr, c0, 4 @ fmrs r0, s1
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/linux-4.4.14/arch/arm/include/asm/hardware/ |
H A D | iop3xx.h | 224 asm volatile("mrc p6, 0, %0, c0, c1, 0" : "=r" (val)); read_tmr0() 241 asm volatile("mrc p6, 0, %0, c2, c1, 0" : "=r" (val)); read_tcr0() 253 asm volatile("mrc p6, 0, %0, c3, c1, 0" : "=r" (val)); read_tcr1() 280 asm volatile("mrc p6, 0, %0, c7, c1, 0":"=r" (val)); read_wdtcr()
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H A D | cp14.h | 28 asm volatile("mrc p14, "#op1", %0, "#crn", "#crm", "#op2 : "=r" (val)); \
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/linux-4.4.14/arch/arm/lib/ |
H A D | csumpartialcopyuser.S | 22 mrc p15, 0, ip, c3, c0, 0
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/linux-4.4.14/arch/arm64/kernel/ |
H A D | kuser32.S | 70 .inst 0xee1d0f70 // mrc p15, 0, r0, c13, c0, 3
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/linux-4.4.14/arch/arm/mach-pxa/ |
H A D | irq.c | 115 __asm__ __volatile__("mrc p6, 0, %0, c5, c0, 0\n": "=r"(ichp)); ichp_handle_irq()
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H A D | pxa3xx.c | 346 __asm__ __volatile__("mrc p15, 0, %0, c15, c1, 0\n": "=r"(value)); __pxa3xx_init_irq()
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/linux-4.4.14/arch/arm/mach-highbank/ |
H A D | highbank.c | 48 asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); highbank_scu_map_io()
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/linux-4.4.14/arch/arm/mach-mv78xx0/ |
H A D | common.c | 42 __asm__("mrc p15, 1, %0, c15, c1, 0" : "=r" (extra)); mv78xx0_core_index()
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/linux-4.4.14/arch/arm/common/ |
H A D | mcpm_head.S | 56 mrc p15, 0, r0, c0, c0, 5 @ MPIDR
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H A D | bL_switcher.c | 56 asm volatile ("mrc p15, 0, %0, c0, c0, 5" : "=r" (id)); read_mpidr()
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/linux-4.4.14/arch/arm/mach-omap1/ |
H A D | sleep.S | 109 mrc p15, 0, r9, c1, c0, 0
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/linux-4.4.14/drivers/iommu/ |
H A D | msm_iommu.c | 39 " mrc " #processor "," #op1 ", %0," #crn "," #crm "," #op2 "\n" \
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/linux-4.4.14/drivers/firmware/ |
H A D | qcom_scm-32.c | 234 asm volatile("mrc p15, 0, %0, c0, c0, 1" : "=r" (ctr)); qcom_scm_inv_range()
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/linux-4.4.14/drivers/net/wireless/iwlegacy/ |
H A D | 4965-calib.c | 382 D_CALIB("ofdm: ac %u mrc %u x1 %u mrc_x1 %u thresh %u\n", il4965_prepare_legacy_sensitivity_tbl() 387 D_CALIB("cck: ac %u mrc %u thresh %u\n", data->auto_corr_cck, il4965_prepare_legacy_sensitivity_tbl()
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H A D | 3945.c | 931 D_INFO("SKU OP mode is mrc\n"); il3945_nic_config()
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/linux-4.4.14/drivers/net/wireless/iwlwifi/dvm/ |
H A D | calib.c | 460 IWL_DEBUG_CALIB(priv, "ofdm: ac %u mrc %u x1 %u mrc_x1 %u thresh %u\n", iwl_prepare_legacy_sensitivity_tbl() 465 IWL_DEBUG_CALIB(priv, "cck: ac %u mrc %u thresh %u\n", iwl_prepare_legacy_sensitivity_tbl()
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/linux-4.4.14/drivers/staging/lustre/lustre/include/lustre/ |
H A D | lustre_idl.h | 2419 static inline void set_mrc_cr_flags(struct mdt_rec_create *mrc, __u64 flags) set_mrc_cr_flags() argument 2421 mrc->cr_flags_l = (__u32)(flags & 0xFFFFFFFFUll); set_mrc_cr_flags() 2422 mrc->cr_flags_h = (__u32)(flags >> 32); set_mrc_cr_flags() 2425 static inline __u64 get_mrc_cr_flags(struct mdt_rec_create *mrc) get_mrc_cr_flags() argument 2427 return ((__u64)(mrc->cr_flags_l) | ((__u64)mrc->cr_flags_h << 32)); get_mrc_cr_flags()
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/linux-4.4.14/arch/arm/probes/kprobes/ |
H A D | test-arm.c | 1252 TEST_COPROCESSOR( "mrc"two" 15, 7, r15, cr15, cr15, 7") \ kprobe_arm_test_cases() 1253 TEST_COPROCESSOR( "mrc"two" 0, 0, r0, cr0, cr0, 0") kprobe_arm_test_cases()
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/linux-4.4.14/drivers/usb/gadget/udc/ |
H A D | pxa25x_udc.c | 2116 asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev)); pxa25x_udc_probe()
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/linux-4.4.14/drivers/bus/ |
H A D | arm-cci.c | 1822 " mrc p15, 0, r0, c0, c0, 5 @ get MPIDR value \n" cci_enable_port_for_self()
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/linux-4.4.14/arch/arm64/kvm/ |
H A D | sys_regs.c | 1097 * kvm_handle_cp15_32 -- handles a mrc/mcr trap on a guest CP15 access
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