Searched refs:mmSDMA0_GFX_RB_BASE (Results 1 – 7 of 7) sorted by relevance
188 #define mmSDMA0_GFX_RB_BASE 0x3481 macro
215 #define mmSDMA0_GFX_RB_BASE 0x3481 macro
340 #define mmSDMA0_GFX_RB_BASE 0x3481 macro
247 #define mmSDMA0_GFX_RB_BASE 0x3481 macro
444 WREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i], ring->gpu_addr >> 8); in cik_sdma_gfx_resume()1097 i, RREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i])); in cik_sdma_print_status()
487 WREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i], ring->gpu_addr >> 8); in sdma_v2_4_gfx_resume()1111 i, RREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i])); in sdma_v2_4_print_status()
624 WREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i], ring->gpu_addr >> 8); in sdma_v3_0_gfx_resume()1271 i, RREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i])); in sdma_v3_0_print_status()