Searched refs:mmHDMI_ACR_32_0 (Results 1 – 6 of 6) sorted by relevance
1680 tmp = RREG32(mmHDMI_ACR_32_0 + dig->afmt->offset); in dce_v11_0_afmt_update_ACR()1682 WREG32(mmHDMI_ACR_32_0 + dig->afmt->offset, tmp); in dce_v11_0_afmt_update_ACR()
1692 tmp = RREG32(mmHDMI_ACR_32_0 + dig->afmt->offset); in dce_v10_0_afmt_update_ACR()1694 WREG32(mmHDMI_ACR_32_0 + dig->afmt->offset, tmp); in dce_v10_0_afmt_update_ACR()
1663 WREG32(mmHDMI_ACR_32_0 + offset, (acr.cts_32khz << HDMI_ACR_44_0__HDMI_ACR_CTS_44__SHIFT)); in dce_v8_0_afmt_update_ACR()
3182 #define mmHDMI_ACR_32_0 0x1c37 macro
3827 #define mmHDMI_ACR_32_0 0x4a2e macro
3962 #define mmHDMI_ACR_32_0 0x4a2e macro