Searched refs:mmCP_INT_CNTL_RING0 (Results 1 – 6 of 6) sorted by relevance
2998 u32 tmp = RREG32(mmCP_INT_CNTL_RING0); in gfx_v8_0_enable_gui_idle_interrupt()3011 WREG32(mmCP_INT_CNTL_RING0, tmp); in gfx_v8_0_enable_gui_idle_interrupt()4257 RREG32(mmCP_INT_CNTL_RING0)); in gfx_v8_0_print_status()4793 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v8_0_set_gfx_eop_interrupt_state()4796 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v8_0_set_gfx_eop_interrupt_state()4799 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v8_0_set_gfx_eop_interrupt_state()4803 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v8_0_set_gfx_eop_interrupt_state()4863 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v8_0_set_priv_reg_fault_state()4866 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v8_0_set_priv_reg_fault_state()4869 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v8_0_set_priv_reg_fault_state()[all …]
3580 u32 tmp = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_enable_gui_idle_interrupt()3588 WREG32(mmCP_INT_CNTL_RING0, tmp); in gfx_v7_0_enable_gui_idle_interrupt()5171 RREG32(mmCP_INT_CNTL_RING0)); in gfx_v7_0_print_status()5302 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_set_gfx_eop_interrupt_state()5304 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_gfx_eop_interrupt_state()5307 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_set_gfx_eop_interrupt_state()5309 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_gfx_eop_interrupt_state()5367 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_set_priv_reg_fault_state()5369 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_priv_reg_fault_state()5372 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_set_priv_reg_fault_state()[all …]
222 #define mmCP_INT_CNTL_RING0 0x306a macro
246 #define mmCP_INT_CNTL_RING0 0x306a macro
247 #define mmCP_INT_CNTL_RING0 0x306a macro