Searched refs:mbase (Results 1 - 24 of 24) sorted by relevance

/linux-4.4.14/drivers/usb/musb/
H A Dmusbhsdma.h45 #define musb_read_hsdma_addr(mbase, bchannel) \
46 musb_readl(mbase, \
49 #define musb_write_hsdma_addr(mbase, bchannel, addr) \
50 musb_writel(mbase, \
54 #define musb_read_hsdma_count(mbase, bchannel) \
55 musb_readl(mbase, \
58 #define musb_write_hsdma_count(mbase, bchannel, len) \
59 musb_writel(mbase, \
75 static inline u32 musb_read_hsdma_addr(void __iomem *mbase, u8 bchannel) musb_read_hsdma_addr() argument
77 u32 addr = musb_readw(mbase, musb_read_hsdma_addr()
82 addr |= musb_readw(mbase, musb_read_hsdma_addr()
88 static inline void musb_write_hsdma_addr(void __iomem *mbase, musb_write_hsdma_addr() argument
91 musb_writew(mbase, musb_write_hsdma_addr()
94 musb_writew(mbase, musb_write_hsdma_addr()
99 static inline u32 musb_read_hsdma_count(void __iomem *mbase, u8 bchannel) musb_read_hsdma_count() argument
101 u32 count = musb_readw(mbase, musb_read_hsdma_count()
106 count |= musb_readw(mbase, musb_read_hsdma_count()
112 static inline void musb_write_hsdma_count(void __iomem *mbase, musb_write_hsdma_count() argument
115 musb_writew(mbase, musb_write_hsdma_count()
117 musb_writew(mbase, musb_write_hsdma_count()
H A Dmusb_regs.h303 static inline void musb_write_txfifosz(void __iomem *mbase, u8 c_size) musb_write_txfifosz() argument
305 musb_writeb(mbase, MUSB_TXFIFOSZ, c_size); musb_write_txfifosz()
308 static inline void musb_write_txfifoadd(void __iomem *mbase, u16 c_off) musb_write_txfifoadd() argument
310 musb_writew(mbase, MUSB_TXFIFOADD, c_off); musb_write_txfifoadd()
313 static inline void musb_write_rxfifosz(void __iomem *mbase, u8 c_size) musb_write_rxfifosz() argument
315 musb_writeb(mbase, MUSB_RXFIFOSZ, c_size); musb_write_rxfifosz()
318 static inline void musb_write_rxfifoadd(void __iomem *mbase, u16 c_off) musb_write_rxfifoadd() argument
320 musb_writew(mbase, MUSB_RXFIFOADD, c_off); musb_write_rxfifoadd()
323 static inline void musb_write_ulpi_buscontrol(void __iomem *mbase, u8 val) musb_write_ulpi_buscontrol() argument
325 musb_writeb(mbase, MUSB_ULPI_BUSCONTROL, val); musb_write_ulpi_buscontrol()
328 static inline u8 musb_read_txfifosz(void __iomem *mbase) musb_read_txfifosz() argument
330 return musb_readb(mbase, MUSB_TXFIFOSZ); musb_read_txfifosz()
333 static inline u16 musb_read_txfifoadd(void __iomem *mbase) musb_read_txfifoadd() argument
335 return musb_readw(mbase, MUSB_TXFIFOADD); musb_read_txfifoadd()
338 static inline u8 musb_read_rxfifosz(void __iomem *mbase) musb_read_rxfifosz() argument
340 return musb_readb(mbase, MUSB_RXFIFOSZ); musb_read_rxfifosz()
343 static inline u16 musb_read_rxfifoadd(void __iomem *mbase) musb_read_rxfifoadd() argument
345 return musb_readw(mbase, MUSB_RXFIFOADD); musb_read_rxfifoadd()
348 static inline u8 musb_read_ulpi_buscontrol(void __iomem *mbase) musb_read_ulpi_buscontrol() argument
350 return musb_readb(mbase, MUSB_ULPI_BUSCONTROL); musb_read_ulpi_buscontrol()
353 static inline u8 musb_read_configdata(void __iomem *mbase) musb_read_configdata() argument
355 musb_writeb(mbase, MUSB_INDEX, 0); musb_read_configdata()
356 return musb_readb(mbase, 0x10 + MUSB_CONFIGDATA); musb_read_configdata()
359 static inline u16 musb_read_hwvers(void __iomem *mbase) musb_read_hwvers() argument
361 return musb_readw(mbase, MUSB_HWVERS); musb_read_hwvers()
503 static inline void musb_write_txfifosz(void __iomem *mbase, u8 c_size) musb_write_txfifosz() argument
507 static inline void musb_write_txfifoadd(void __iomem *mbase, u16 c_off) musb_write_txfifoadd() argument
511 static inline void musb_write_rxfifosz(void __iomem *mbase, u8 c_size) musb_write_rxfifosz() argument
515 static inline void musb_write_rxfifoadd(void __iomem *mbase, u16 c_off) musb_write_rxfifoadd() argument
519 static inline void musb_write_ulpi_buscontrol(void __iomem *mbase, u8 val) musb_write_ulpi_buscontrol() argument
523 static inline u8 musb_read_txfifosz(void __iomem *mbase) musb_read_txfifosz() argument
528 static inline u16 musb_read_txfifoadd(void __iomem *mbase) musb_read_txfifoadd() argument
533 static inline u8 musb_read_rxfifosz(void __iomem *mbase) musb_read_rxfifosz() argument
538 static inline u16 musb_read_rxfifoadd(void __iomem *mbase) musb_read_rxfifoadd() argument
543 static inline u8 musb_read_ulpi_buscontrol(void __iomem *mbase) musb_read_ulpi_buscontrol() argument
548 static inline u8 musb_read_configdata(void __iomem *mbase) musb_read_configdata() argument
553 static inline u16 musb_read_hwvers(void __iomem *mbase) musb_read_hwvers() argument
562 static inline void musb_write_rxfunaddr(void __iomem *mbase, u8 epnum, musb_write_rxfunaddr() argument
567 static inline void musb_write_rxhubaddr(void __iomem *mbase, u8 epnum, musb_write_rxhubaddr() argument
572 static inline void musb_write_rxhubport(void __iomem *mbase, u8 epnum, musb_write_rxhubport() argument
577 static inline void musb_write_txfunaddr(void __iomem *mbase, u8 epnum, musb_write_txfunaddr() argument
582 static inline void musb_write_txhubaddr(void __iomem *mbase, u8 epnum, musb_write_txhubaddr() argument
587 static inline void musb_write_txhubport(void __iomem *mbase, u8 epnum, musb_write_txhubport() argument
592 static inline u8 musb_read_rxfunaddr(void __iomem *mbase, u8 epnum) musb_read_rxfunaddr() argument
597 static inline u8 musb_read_rxhubaddr(void __iomem *mbase, u8 epnum) musb_read_rxhubaddr() argument
602 static inline u8 musb_read_rxhubport(void __iomem *mbase, u8 epnum) musb_read_rxhubport() argument
607 static inline u8 musb_read_txfunaddr(void __iomem *mbase, u8 epnum) musb_read_txfunaddr() argument
612 static inline u8 musb_read_txhubaddr(void __iomem *mbase, u8 epnum) musb_read_txhubaddr() argument
617 static inline u8 musb_read_txhubport(void __iomem *mbase, u8 epnum) musb_read_txhubport() argument
H A Dmusbhsdma.c116 void __iomem *mbase = controller->base; configure_channel() local
138 musb_write_hsdma_addr(mbase, bchannel, dma_addr); configure_channel()
139 musb_write_hsdma_count(mbase, bchannel, len); configure_channel()
142 musb_writew(mbase, configure_channel()
197 void __iomem *mbase = musb_channel->controller->base; dma_channel_abort() local
213 csr = musb_readw(mbase, offset); dma_channel_abort()
215 musb_writew(mbase, offset, csr); dma_channel_abort()
217 musb_writew(mbase, offset, csr); dma_channel_abort()
222 csr = musb_readw(mbase, offset); dma_channel_abort()
226 musb_writew(mbase, offset, csr); dma_channel_abort()
229 musb_writew(mbase, dma_channel_abort()
232 musb_write_hsdma_addr(mbase, bchannel, 0); dma_channel_abort()
233 musb_write_hsdma_count(mbase, bchannel, 0); dma_channel_abort()
247 void __iomem *mbase = controller->base; dma_controller_irq() local
261 int_hsdma = musb_readb(mbase, MUSB_HSDMA_INTR); dma_controller_irq()
265 musb_writeb(mbase, MUSB_HSDMA_INTR, int_hsdma); dma_controller_irq()
276 count = musb_read_hsdma_count(mbase, bchannel); dma_controller_irq()
295 csr = musb_readw(mbase, dma_controller_irq()
305 addr = musb_read_hsdma_addr(mbase, dma_controller_irq()
318 devctl = musb_readb(mbase, MUSB_DEVCTL); dma_controller_irq()
338 musb_ep_select(mbase, epnum); dma_controller_irq()
339 txcsr = musb_readw(mbase, offset); dma_controller_irq()
342 musb_writew(mbase, offset, txcsr); dma_controller_irq()
346 musb_writew(mbase, offset, txcsr); dma_controller_irq()
H A Dmusb_virthub.c81 void __iomem *mbase = musb->mregs; musb_port_suspend() local
91 power = musb_readb(mbase, MUSB_POWER); musb_port_suspend()
97 musb_writeb(mbase, MUSB_POWER, power); musb_port_suspend()
100 power = musb_readb(mbase, MUSB_POWER); musb_port_suspend()
102 power = musb_readb(mbase, MUSB_POWER); musb_port_suspend()
132 musb_writeb(mbase, MUSB_POWER, power); musb_port_suspend()
146 void __iomem *mbase = musb->mregs; musb_port_reset() local
160 power = musb_readb(mbase, MUSB_POWER); musb_port_reset()
179 musb_writeb(mbase, MUSB_POWER, musb_port_reset()
189 musb_writeb(mbase, MUSB_POWER, musb_port_reset()
199 musb_writeb(mbase, MUSB_POWER, musb_port_reset()
203 power = musb_readb(mbase, MUSB_POWER); musb_port_reset()
H A Dmusb_dsps.c890 void __iomem *mbase; dsps_suspend() local
898 mbase = musb->ctrl_base; dsps_suspend()
899 glue->context.control = dsps_readl(mbase, wrp->control); dsps_suspend()
900 glue->context.epintr = dsps_readl(mbase, wrp->epintr_set); dsps_suspend()
901 glue->context.coreintr = dsps_readl(mbase, wrp->coreintr_set); dsps_suspend()
902 glue->context.phy_utmi = dsps_readl(mbase, wrp->phy_utmi); dsps_suspend()
903 glue->context.mode = dsps_readl(mbase, wrp->mode); dsps_suspend()
904 glue->context.tx_mode = dsps_readl(mbase, wrp->tx_mode); dsps_suspend()
905 glue->context.rx_mode = dsps_readl(mbase, wrp->rx_mode); dsps_suspend()
915 void __iomem *mbase; dsps_resume() local
920 mbase = musb->ctrl_base; dsps_resume()
921 dsps_writel(mbase, wrp->control, glue->context.control); dsps_resume()
922 dsps_writel(mbase, wrp->epintr_set, glue->context.epintr); dsps_resume()
923 dsps_writel(mbase, wrp->coreintr_set, glue->context.coreintr); dsps_resume()
924 dsps_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi); dsps_resume()
925 dsps_writel(mbase, wrp->mode, glue->context.mode); dsps_resume()
926 dsps_writel(mbase, wrp->tx_mode, glue->context.tx_mode); dsps_resume()
927 dsps_writel(mbase, wrp->rx_mode, glue->context.rx_mode); dsps_resume()
H A Dmusb_gadget_ep0.c79 void __iomem *mbase = musb->mregs; service_tx_status_request() local
130 musb_ep_select(mbase, epnum); service_tx_status_request()
137 musb_ep_select(mbase, 0); service_tx_status_request()
206 void __iomem *mbase = musb->mregs; musb_try_b_hnp_enable() local
210 devctl = musb_readb(mbase, MUSB_DEVCTL); musb_try_b_hnp_enable()
211 musb_writeb(mbase, MUSB_DEVCTL, devctl | MUSB_DEVCTL_HR); musb_try_b_hnp_enable()
231 void __iomem *mbase = musb->mregs; variable
285 musb_ep_select(mbase, epnum);
311 musb_ep_select(mbase, 0);
444 musb_ep_select(mbase, epnum);
463 musb_ep_select(mbase, 0);
670 void __iomem *mbase = musb->mregs; musb_g_ep0_irq() local
674 musb_ep_select(mbase, 0); /* select ep0 */ musb_g_ep0_irq()
750 musb_writeb(mbase, MUSB_FADDR, musb->address); musb_g_ep0_irq()
760 musb_writeb(mbase, MUSB_TESTMODE, musb_g_ep0_irq()
817 power = musb_readb(mbase, MUSB_POWER); musb_g_ep0_irq()
882 musb_ep_select(mbase, 0); musb_g_ep0_irq()
H A Dmusb_core.c234 static void musb_flat_ep_select(void __iomem *mbase, u8 epnum) musb_flat_ep_select() argument
244 static void musb_indexed_ep_select(void __iomem *mbase, u8 epnum) musb_indexed_ep_select() argument
246 musb_writeb(mbase, MUSB_INDEX, epnum); musb_indexed_ep_select()
489 void __iomem *mbase = musb->mregs; musb_hnp_stop() local
507 reg = musb_readb(mbase, MUSB_POWER); musb_hnp_stop()
509 musb_writeb(mbase, MUSB_POWER, reg); musb_hnp_stop()
618 void __iomem *mbase = musb->mregs; musb_stage0_irq() local
636 musb_writeb(mbase, MUSB_DEVCTL, MUSB_DEVCTL_SESSION); musb_stage0_irq()
675 void __iomem *mbase = musb->mregs; musb_stage0_irq() local
680 musb_writeb(mbase, MUSB_DEVCTL, devctl); musb_stage0_irq()
944 void __iomem *mbase = musb->mregs; musb_stage0_irq()
953 frame = musb_readw(mbase, MUSB_FRAME); musb_stage0_irq()
985 void __iomem *mbase = musb->mregs; musb_disable_interrupts() local
989 musb_writeb(mbase, MUSB_INTRUSBE, 0); musb_disable_interrupts()
991 musb_writew(mbase, MUSB_INTRTXE, 0); musb_disable_interrupts()
993 musb_writew(mbase, MUSB_INTRRXE, 0); musb_disable_interrupts()
996 temp = musb_readb(mbase, MUSB_INTRUSB); musb_disable_interrupts()
997 temp = musb_readw(mbase, MUSB_INTRTX); musb_disable_interrupts()
998 temp = musb_readw(mbase, MUSB_INTRRX); musb_disable_interrupts()
1016 void __iomem *mbase = musb->mregs; musb_generic_disable() local
1021 musb_writeb(mbase, MUSB_DEVCTL, 0); musb_generic_disable()
1249 void __iomem *mbase = musb->mregs; fifo_setup() local
1272 musb_writeb(mbase, MUSB_INDEX, hw_ep->epnum); fifo_setup()
1282 musb_write_txfifosz(mbase, c_size); fifo_setup()
1283 musb_write_txfifoadd(mbase, c_off); fifo_setup()
1288 musb_write_rxfifosz(mbase, c_size); fifo_setup()
1289 musb_write_rxfifoadd(mbase, c_off); fifo_setup()
1294 musb_write_txfifosz(mbase, c_size); fifo_setup()
1295 musb_write_txfifoadd(mbase, c_off); fifo_setup()
1299 musb_write_rxfifosz(mbase, c_size); fifo_setup()
1300 musb_write_rxfifoadd(mbase, c_off); fifo_setup()
1415 void __iomem *mbase = musb->mregs; ep_config_from_hw() local
1423 musb_ep_select(mbase, epnum); ep_config_from_hw()
1463 void __iomem *mbase = musb->mregs; musb_core_init() local
1468 reg = musb_read_configdata(mbase); musb_core_init()
1512 musb->hwvers = musb_read_hwvers(mbase); musb_core_init()
1538 hw_ep->fifo = musb->io.fifo_offset(i) + mbase; musb_core_init()
1549 hw_ep->conf = mbase - 0x400 + TUSB_EP0_CONF; musb_core_init()
1551 hw_ep->conf = mbase + 0x400 + musb_core_init()
1556 hw_ep->regs = musb->io.ep_offset(i, 0) + mbase; musb_core_init()
1890 struct musb_hdrc_config *config, void __iomem *mbase) allocate_instance()
1907 musb->mregs = mbase; allocate_instance()
1908 musb->ctrl_base = mbase; allocate_instance()
1889 allocate_instance(struct device *dev, struct musb_hdrc_config *config, void __iomem *mbase) allocate_instance() argument
H A Dmusb_gadget.c445 u8 __iomem *mbase = musb->mregs; musb_g_tx() local
450 musb_ep_select(mbase, epnum); musb_g_tx()
544 musb_ep_select(mbase, epnum); musb_g_tx()
836 void __iomem *mbase = musb->mregs; musb_g_rx() local
847 musb_ep_select(mbase, epnum); musb_g_rx()
937 musb_ep_select(mbase, epnum); musb_g_rx()
961 void __iomem *mbase; musb_gadget_enable() local
974 mbase = musb->mregs; musb_gadget_enable()
1014 musb_ep_select(mbase, epnum); musb_gadget_enable()
1028 musb_writew(mbase, MUSB_INTRTXE, musb->intrtxe); musb_gadget_enable()
1071 musb_writew(mbase, MUSB_INTRRXE, musb->intrrxe); musb_gadget_enable()
1359 void __iomem *mbase; musb_gadget_set_halt() local
1367 mbase = musb->mregs; musb_gadget_set_halt()
1376 musb_ep_select(mbase, epnum); musb_gadget_set_halt()
1459 void __iomem *mbase = musb->mregs; musb_gadget_fifo_status() local
1464 musb_ep_select(mbase, epnum); musb_gadget_fifo_status()
1479 void __iomem *mbase; musb_gadget_fifo_flush() local
1483 mbase = musb->mregs; musb_gadget_fifo_flush()
1486 musb_ep_select(mbase, (u8) epnum); musb_gadget_fifo_flush()
1489 musb_writew(mbase, MUSB_INTRTXE, musb->intrtxe & ~(1 << epnum)); musb_gadget_fifo_flush()
1513 musb_writew(mbase, MUSB_INTRTXE, musb->intrtxe); musb_gadget_fifo_flush()
2082 void __iomem *mbase = musb->mregs; variable
2083 u8 devctl = musb_readb(mbase, MUSB_DEVCTL);
2103 musb_writeb(mbase, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
2107 power = musb_readb(mbase, MUSB_POWER);
H A Dmusb_io.h55 void (*ep_select)(void __iomem *mbase, u8 epnum);
H A Dmusb_host.c223 void __iomem *mbase = musb->mregs; musb_start_urb() local
281 frame = musb_readw(mbase, MUSB_FRAME); musb_start_urb()
296 musb_writeb(mbase, MUSB_INTRUSBE, 0xff); musb_start_urb()
481 /* musb_ep_select(mbase, epnum); */ musb_host_packet_rx()
748 void __iomem *mbase = musb->mregs; musb_ep_program() local
764 musb_ep_select(mbase, epnum); musb_ep_program()
801 musb_writew(mbase, MUSB_INTRTXE, int_txe & ~(1 << epnum)); musb_ep_program()
854 musb_writeb(mbase, MUSB_FADDR, qh->addr_reg); musb_ep_program()
916 musb_writew(mbase, MUSB_INTRTXE, int_txe); musb_ep_program()
989 void __iomem *mbase = musb->mregs; musb_bulk_nak_timeout() local
994 musb_ep_select(mbase, ep->epnum); musb_bulk_nak_timeout()
1134 void __iomem *mbase = musb->mregs; musb_h_ep0_irq() local
1144 musb_ep_select(mbase, 0); musb_h_ep0_irq()
1282 void __iomem *mbase = musb->mregs; musb_host_tx() local
1286 musb_ep_select(mbase, epnum); musb_host_tx()
1331 musb_ep_select(mbase, epnum); musb_host_tx()
1357 musb_ep_select(mbase, epnum); musb_host_tx()
1541 musb_ep_select(mbase, epnum); musb_host_tx()
1823 void __iomem *mbase = musb->mregs; musb_host_rx() local
1832 musb_ep_select(mbase, epnum); musb_host_rx()
1892 musb_ep_select(mbase, epnum); musb_host_rx()
1953 musb_ep_select(mbase, epnum); musb_host_rx()
1989 musb_ep_select(mbase, epnum); musb_host_rx()
H A Dtusb6010_omap.c116 void __iomem *mbase = musb->mregs; tusb_omap_dma_cb() local
197 musb_ep_select(mbase, chdat->epnum); tusb_omap_dma_cb()
216 void __iomem *mbase = musb->mregs; tusb_omap_dma_program() local
372 musb_ep_select(mbase, chdat->epnum); tusb_omap_dma_program()
379 musb_ep_select(mbase, chdat->epnum); tusb_omap_dma_program()
H A Dmusb_core.h190 void (*ep_select)(void __iomem *mbase, u8 epnum);
486 void __iomem *mbase = musb->mregs; musb_read_fifosize() local
490 reg = musb_readb(mbase, musb->io.ep_offset(epnum, MUSB_FIFOSIZE)); musb_read_fifosize()
H A Dcppi_dma.c1377 void __iomem *mbase; cppi_channel_abort() local
1405 mbase = controller->mregs; cppi_channel_abort()
1416 musb_ep_select(mbase, cppi_ch->index + 1); cppi_channel_abort()
H A Dtusb6010.c140 static void tusb_ep_select(void __iomem *mbase, u8 epnum) tusb_ep_select() argument
142 musb_writeb(mbase, MUSB_INDEX, epnum); tusb_ep_select()
/linux-4.4.14/arch/microblaze/pci/
H A Dindirect_pci.c154 void __iomem *mbase; setup_indirect_pci() local
156 mbase = ioremap(base, PAGE_SIZE); setup_indirect_pci()
157 hose->cfg_addr = mbase + (cfg_addr & ~PAGE_MASK); setup_indirect_pci()
159 mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE); setup_indirect_pci()
160 hose->cfg_data = mbase + (cfg_data & ~PAGE_MASK); setup_indirect_pci()
/linux-4.4.14/drivers/isdn/hardware/avm/
H A Dc4.c151 while (c4inmeml(card->mbase + DOORBELL) != 0xffffffff) { wait_for_doorbell()
165 c4outmeml(card->mbase + MBOX_PEEK_POKE, off); c4_poke()
166 c4outmeml(card->mbase + DOORBELL, DBELL_ADDR); c4_poke()
171 c4outmeml(card->mbase + MBOX_PEEK_POKE, value); c4_poke()
172 c4outmeml(card->mbase + DOORBELL, DBELL_DATA | DBELL_ADDR); c4_poke()
182 c4outmeml(card->mbase + MBOX_PEEK_POKE, off); c4_peek()
183 c4outmeml(card->mbase + DOORBELL, DBELL_RNWR | DBELL_ADDR); c4_peek()
188 *valuep = c4inmeml(card->mbase + MBOX_PEEK_POKE); c4_peek()
300 c4outmeml(card->mbase + DOORBELL, DBELL_RESET_ARM); c4_reset()
303 while (c4inmeml(card->mbase + DOORBELL) != 0xffffffff) { c4_reset()
306 c4outmeml(card->mbase + DOORBELL, DBELL_ADDR); c4_reset()
320 c4outmeml(card->mbase + PCI_OUT_INT_MASK, 0x0c); c4_detect()
321 if (c4inmeml(card->mbase + PCI_OUT_INT_MASK) != 0x0c) c4_detect()
324 c4outmeml(card->mbase + DOORBELL, DBELL_RESET_ARM); c4_detect()
327 while (c4inmeml(card->mbase + DOORBELL) != 0xffffffff) { c4_detect()
330 c4outmeml(card->mbase + DOORBELL, DBELL_ADDR); c4_detect()
337 c4outmeml(card->mbase + MAILBOX_0, 0x55aa55aa); c4_detect()
338 if (c4inmeml(card->mbase + MAILBOX_0) != 0x55aa55aa) return 3; c4_detect()
340 c4outmeml(card->mbase + MAILBOX_0, 0xaa55aa55); c4_detect()
341 if (c4inmeml(card->mbase + MAILBOX_0) != 0xaa55aa55) return 4; c4_detect()
468 c4outmeml(card->mbase + MBOX_DOWN_ADDR, dma->sendbuf.dmaaddr); c4_dispatch_tx()
469 c4outmeml(card->mbase + MBOX_DOWN_LEN, txlen); c4_dispatch_tx()
473 c4outmeml(card->mbase + DOORBELL, DBELL_DOWN_ARM); c4_dispatch_tx()
672 status = c4inmeml(card->mbase + DOORBELL); c4_handle_interrupt()
676 c4outmeml(card->mbase + PCI_OUT_INT_MASK, 0x0c); c4_handle_interrupt()
698 c4outmeml(card->mbase + DOORBELL, status); c4_handle_interrupt()
701 card->dma->recvlen = c4inmeml(card->mbase + MBOX_UP_LEN); c4_handle_interrupt()
702 c4outmeml(card->mbase + MBOX_UP_LEN, 0); c4_handle_interrupt()
705 c4outmeml(card->mbase + MBOX_UP_LEN, card->dma->recvbuf.size); c4_handle_interrupt()
706 c4outmeml(card->mbase + DOORBELL, DBELL_UP_ARM); c4_handle_interrupt()
713 if (c4inmeml(card->mbase + MBOX_DOWN_LEN) == 0) { c4_handle_interrupt()
869 c4outmeml(card->mbase + MBOX_UP_LEN, 0); c4_load_firmware()
870 c4outmeml(card->mbase + MBOX_DOWN_LEN, 0); c4_load_firmware()
871 c4outmeml(card->mbase + DOORBELL, DBELL_INIT); c4_load_firmware()
873 c4outmeml(card->mbase + DOORBELL, c4_load_firmware()
876 c4outmeml(card->mbase + PCI_OUT_INT_MASK, 0x08); c4_load_firmware()
879 c4outmeml(card->mbase + MBOX_UP_ADDR, card->dma->recvbuf.dmaaddr); c4_load_firmware()
880 c4outmeml(card->mbase + MBOX_UP_LEN, card->dma->recvbuf.size); c4_load_firmware()
881 c4outmeml(card->mbase + DOORBELL, DBELL_UP_ARM); c4_load_firmware()
937 iounmap(card->mbase); c4_remove()
1179 card->mbase = ioremap(card->membase, 128); c4_add_card()
1180 if (card->mbase == NULL) { c4_add_card()
1239 iounmap(card->mbase); c4_add_card()
H A Dt1pci.c83 card->mbase = ioremap(card->membase, 64); t1pci_add_card()
84 if (!card->mbase) { t1pci_add_card()
142 iounmap(card->mbase); t1pci_add_card()
164 iounmap(card->mbase); t1pci_remove()
H A Db1pci.c217 card->mbase = ioremap(card->membase, 64); b1pciv4_probe()
218 if (!card->mbase) { b1pciv4_probe()
273 iounmap(card->mbase); b1pciv4_probe()
294 iounmap(card->mbase); b1pciv4_remove()
H A Db1dma.c88 writel(value, card->mbase + off); b1dma_writel()
93 return readl(card->mbase + off); b1dma_readl()
H A Davmcard.h92 void __iomem *mbase; member in struct:avmcard
/linux-4.4.14/arch/powerpc/sysdev/
H A Dppc4xx_pci.c1242 void __iomem *mbase; ppc460sx_pciex_check_link() local
1247 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000); ppc460sx_pciex_check_link()
1248 if (mbase == NULL) { ppc460sx_pciex_check_link()
1254 while (attempt && (0 == (in_le32(mbase + PECFG_460SX_DLLSTA) ppc460sx_pciex_check_link()
1262 iounmap(mbase); ppc460sx_pciex_check_link()
1382 void __iomem *mbase = ioremap(port->cfg_space.start + 0x10000000, ppc_476fpe_pciex_check_link() local
1387 if (mbase == NULL) { ppc_476fpe_pciex_check_link()
1394 val = in_le32(mbase + PECFG_TLDLP); ppc_476fpe_pciex_check_link()
1407 iounmap(mbase); ppc_476fpe_pciex_check_link()
1720 void __iomem *mbase, ppc4xx_setup_one_pciex_POM()
1748 out_le32(mbase + PECFG_POM0LAH, pciah); ppc4xx_setup_one_pciex_POM()
1749 out_le32(mbase + PECFG_POM0LAL, pcial); ppc4xx_setup_one_pciex_POM()
1771 out_le32(mbase + PECFG_POM1LAH, pciah); ppc4xx_setup_one_pciex_POM()
1772 out_le32(mbase + PECFG_POM1LAL, pcial); ppc4xx_setup_one_pciex_POM()
1780 out_le32(mbase + PECFG_POM2LAH, pciah); ppc4xx_setup_one_pciex_POM()
1781 out_le32(mbase + PECFG_POM2LAL, pcial); ppc4xx_setup_one_pciex_POM()
1797 void __iomem *mbase) ppc4xx_configure_pciex_POMs()
1816 if (ppc4xx_setup_one_pciex_POM(port, hose, mbase, ppc4xx_configure_pciex_POMs()
1834 if (ppc4xx_setup_one_pciex_POM(port, hose, mbase, ppc4xx_configure_pciex_POMs()
1844 ppc4xx_setup_one_pciex_POM(port, hose, mbase, ppc4xx_configure_pciex_POMs()
1851 void __iomem *mbase, ppc4xx_configure_pciex_PIMs()
1870 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa)); ppc4xx_configure_pciex_PIMs()
1871 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa) | ppc4xx_configure_pciex_PIMs()
1875 out_le32(mbase + PECFG_BAR1MPA, 0); ppc4xx_configure_pciex_PIMs()
1876 out_le32(mbase + PECFG_BAR2HMPA, 0); ppc4xx_configure_pciex_PIMs()
1877 out_le32(mbase + PECFG_BAR2LMPA, 0); ppc4xx_configure_pciex_PIMs()
1879 out_le32(mbase + PECFG_PIM01SAH, RES_TO_U32_HIGH(sa)); ppc4xx_configure_pciex_PIMs()
1880 out_le32(mbase + PECFG_PIM01SAL, RES_TO_U32_LOW(sa)); ppc4xx_configure_pciex_PIMs()
1882 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(ep_addr)); ppc4xx_configure_pciex_PIMs()
1883 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(ep_addr)); ppc4xx_configure_pciex_PIMs()
1897 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa)); ppc4xx_configure_pciex_PIMs()
1898 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa)); ppc4xx_configure_pciex_PIMs()
1903 out_le32(mbase + PECFG_PIM0LAL, 0x00000000); ppc4xx_configure_pciex_PIMs()
1904 out_le32(mbase + PECFG_PIM0LAH, 0x00000000); ppc4xx_configure_pciex_PIMs()
1905 out_le32(mbase + PECFG_PIM1LAL, 0x00000000); ppc4xx_configure_pciex_PIMs()
1906 out_le32(mbase + PECFG_PIM1LAH, 0x00000000); ppc4xx_configure_pciex_PIMs()
1907 out_le32(mbase + PECFG_PIM01SAH, 0xffff0000); ppc4xx_configure_pciex_PIMs()
1908 out_le32(mbase + PECFG_PIM01SAL, 0x00000000); ppc4xx_configure_pciex_PIMs()
1910 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start)); ppc4xx_configure_pciex_PIMs()
1911 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start)); ppc4xx_configure_pciex_PIMs()
1915 out_le32(mbase + PECFG_PIMEN, 0x1); ppc4xx_configure_pciex_PIMs()
1918 out_le16(mbase + PCI_COMMAND, ppc4xx_configure_pciex_PIMs()
1919 in_le16(mbase + PCI_COMMAND) | ppc4xx_configure_pciex_PIMs()
1929 void __iomem *mbase = NULL, *cfg_data = NULL; ppc4xx_pciex_port_setup_hose() local
1983 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000); ppc4xx_pciex_port_setup_hose()
1984 if (mbase == NULL) { ppc4xx_pciex_port_setup_hose()
1989 hose->cfg_addr = mbase; ppc4xx_pciex_port_setup_hose()
1999 mbase = (void __iomem *)hose->cfg_addr; ppc4xx_pciex_port_setup_hose()
2005 out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno); ppc4xx_pciex_port_setup_hose()
2006 out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1); ppc4xx_pciex_port_setup_hose()
2007 out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno); ppc4xx_pciex_port_setup_hose()
2013 out_le32(mbase + PECFG_PIMEN, 0); ppc4xx_pciex_port_setup_hose()
2019 if (ppc4xx_parse_dma_ranges(hose, mbase, &dma_window) != 0) ppc4xx_pciex_port_setup_hose()
2023 ppc4xx_configure_pciex_POMs(port, hose, mbase); ppc4xx_pciex_port_setup_hose()
2026 ppc4xx_configure_pciex_PIMs(port, hose, mbase, &dma_window); ppc4xx_pciex_port_setup_hose()
2045 out_le16(mbase + 0x200, val); ppc4xx_pciex_port_setup_hose()
2056 out_le16(mbase + 0x202, val); ppc4xx_pciex_port_setup_hose()
2060 out_le16(mbase + 0x204, 0x7); ppc4xx_pciex_port_setup_hose()
2064 out_le32(mbase + 0x208, 0x06040001); ppc4xx_pciex_port_setup_hose()
2070 out_le32(mbase + 0x208, 0x0b200001); ppc4xx_pciex_port_setup_hose()
2082 if (mbase) ppc4xx_pciex_port_setup_hose()
2083 iounmap(mbase); ppc4xx_pciex_port_setup_hose()
1718 ppc4xx_setup_one_pciex_POM(struct ppc4xx_pciex_port *port, struct pci_controller *hose, void __iomem *mbase, u64 plb_addr, u64 pci_addr, u64 size, unsigned int flags, int index) ppc4xx_setup_one_pciex_POM() argument
1795 ppc4xx_configure_pciex_POMs(struct ppc4xx_pciex_port *port, struct pci_controller *hose, void __iomem *mbase) ppc4xx_configure_pciex_POMs() argument
1849 ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port, struct pci_controller *hose, void __iomem *mbase, struct resource *res) ppc4xx_configure_pciex_PIMs() argument
H A Dindirect_pci.c168 void __iomem *mbase; setup_indirect_pci() local
170 mbase = ioremap(base, PAGE_SIZE); setup_indirect_pci()
171 hose->cfg_addr = mbase + (cfg_addr & ~PAGE_MASK); setup_indirect_pci()
173 mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE); setup_indirect_pci()
174 hose->cfg_data = mbase + (cfg_data & ~PAGE_MASK); setup_indirect_pci()
/linux-4.4.14/arch/powerpc/kernel/
H A Dfadump.c886 unsigned long long mbase, msize; fadump_create_elfcore_headers() local
887 mbase = crash_memory_ranges[i].base; fadump_create_elfcore_headers()
897 phdr->p_offset = mbase; fadump_create_elfcore_headers()
899 if (mbase == RMA_START) { fadump_create_elfcore_headers()
908 phdr->p_paddr = mbase; fadump_create_elfcore_headers()
909 phdr->p_vaddr = (unsigned long)__va(mbase); fadump_create_elfcore_headers()
/linux-4.4.14/drivers/sbus/char/
H A Djsflash.c109 /* int mbase; */ /* Minor base, typically zero */

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