| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| H A D | chan.c | 45 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index]; nvkm_fifo_chan_child_fini() local
49 if (--engn->usecount) nvkm_fifo_chan_child_fini()
61 if (engn->object) { nvkm_fifo_chan_child_fini()
62 ret = nvkm_object_fini(engn->object, suspend); nvkm_fifo_chan_child_fini()
78 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index]; nvkm_fifo_chan_child_init() local
82 if (engn->usecount++) nvkm_fifo_chan_child_init()
85 if (engn->object) { nvkm_fifo_chan_child_init()
86 ret = nvkm_object_init(engn->object); nvkm_fifo_chan_child_init()
111 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index]; nvkm_fifo_chan_child_del() local
116 if (!--engn->refcount) { nvkm_fifo_chan_child_del()
119 nvkm_object_del(&engn->object); nvkm_fifo_chan_child_del()
138 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index]; nvkm_fifo_chan_child_new() local
148 if (!engn->refcount++) { nvkm_fifo_chan_child_new()
159 &engn->object); nvkm_fifo_chan_child_new()
163 NULL, 0, &engn->object); nvkm_fifo_chan_child_new()
170 engn->object); nvkm_fifo_chan_child_new()
178 .engn = oclass->engn, nvkm_fifo_chan_child_new()
182 .parent = engn->object ? nvkm_fifo_chan_child_new()
183 engn->object : nvkm_fifo_chan_child_new()
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| H A D | changf100.h | 20 } engn[NVKM_SUBDEV_NR]; member in struct:gf100_fifo_chan
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| H A D | gf100.c | 81 gf100_fifo_engidx(struct gf100_fifo *fifo, u32 engn) gf100_fifo_engidx() argument
83 switch (engn) { gf100_fifo_engidx()
84 case NVKM_ENGINE_GR : engn = 0; break; gf100_fifo_engidx()
85 case NVKM_ENGINE_MSVLD : engn = 1; break; gf100_fifo_engidx()
86 case NVKM_ENGINE_MSPPP : engn = 2; break; gf100_fifo_engidx()
87 case NVKM_ENGINE_MSPDEC: engn = 3; break; gf100_fifo_engidx()
88 case NVKM_ENGINE_CE0 : engn = 4; break; gf100_fifo_engidx()
89 case NVKM_ENGINE_CE1 : engn = 5; break; gf100_fifo_engidx()
94 return engn; gf100_fifo_engidx()
98 gf100_fifo_engine(struct gf100_fifo *fifo, u32 engn) gf100_fifo_engine() argument
102 switch (engn) { gf100_fifo_engine()
103 case 0: engn = NVKM_ENGINE_GR; break; gf100_fifo_engine()
104 case 1: engn = NVKM_ENGINE_MSVLD; break; gf100_fifo_engine()
105 case 2: engn = NVKM_ENGINE_MSPPP; break; gf100_fifo_engine()
106 case 3: engn = NVKM_ENGINE_MSPDEC; break; gf100_fifo_engine()
107 case 4: engn = NVKM_ENGINE_CE0; break; gf100_fifo_engine()
108 case 5: engn = NVKM_ENGINE_CE1; break; gf100_fifo_engine()
113 return nvkm_device_engine(device, engn); gf100_fifo_engine()
123 u32 engn, engm = 0; gf100_fifo_recover_work() local
131 for (todo = mask; engn = __ffs64(todo), todo; todo &= ~(1 << engn)) gf100_fifo_recover_work()
132 engm |= 1 << gf100_fifo_engidx(fifo, engn); gf100_fifo_recover_work()
135 for (todo = mask; engn = __ffs64(todo), todo; todo &= ~(1 << engn)) { gf100_fifo_recover_work()
136 if ((engine = nvkm_device_engine(device, engn))) { gf100_fifo_recover_work()
180 u32 engn; gf100_fifo_intr_sched_ctxsw() local
183 for (engn = 0; engn < 6; engn++) { gf100_fifo_intr_sched_ctxsw()
184 u32 stat = nvkm_rd32(device, 0x002640 + (engn * 0x04)); gf100_fifo_intr_sched_ctxsw()
195 engine = gf100_fifo_engine(fifo, engn); gf100_fifo_intr_sched_ctxsw()
416 gf100_fifo_intr_engine_unit(struct gf100_fifo *fifo, int engn) gf100_fifo_intr_engine_unit() argument
420 u32 intr = nvkm_rd32(device, 0x0025a8 + (engn * 0x04)); gf100_fifo_intr_engine_unit()
424 nvkm_wr32(device, 0x0025a8 + (engn * 0x04), intr); gf100_fifo_intr_engine_unit()
434 engn, unkn, ints); gf100_fifo_intr_engine_unit()
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| H A D | changk104.h | 21 } engn[NVKM_SUBDEV_NR]; member in struct:gk104_fifo_chan
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| H A D | channv04.h | 11 struct nvkm_gpuobj *engn[NVKM_SUBDEV_NR]; member in struct:nv04_fifo_chan
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| H A D | chang84.c | 97 u32 engn, save; g84_fifo_chan_engine_fini() local
105 engn = g84_fifo_chan_engine(engine); g84_fifo_chan_engine_fini()
106 save = nvkm_mask(device, 0x002520, 0x0000003f, 1 << engn); g84_fifo_chan_engine_fini()
137 struct nvkm_gpuobj *engn = chan->engn[engine->subdev.index]; g84_fifo_chan_engine_init() local
144 limit = engn->addr + engn->size - 1; g84_fifo_chan_engine_init()
145 start = engn->addr; g84_fifo_chan_engine_init()
165 int engn = engine->subdev.index; g84_fifo_chan_engine_ctor() local
170 return nvkm_object_bind(object, NULL, 0, &chan->engn[engn]); g84_fifo_chan_engine_ctor()
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| H A D | gk104.c | 52 struct gk104_fifo_engn *engn = &fifo->engine[engine]; gk104_fifo_runlist_update() local
60 cur = engn->runlist[engn->cur_runlist]; gk104_fifo_runlist_update()
61 engn->cur_runlist = !engn->cur_runlist; gk104_fifo_runlist_update()
64 list_for_each_entry(chan, &engn->chan, head) { gk104_fifo_runlist_update()
74 if (wait_event_timeout(engn->wait, !(nvkm_rd32(device, 0x002284 + gk104_fifo_runlist_update()
82 gk104_fifo_engine(struct gk104_fifo *fifo, u32 engn) gk104_fifo_engine() argument
85 u64 subdevs = gk104_fifo_engine_subdev(engn); gk104_fifo_engine()
98 u32 engn, engm = 0; gk104_fifo_recover_work() local
106 for (todo = mask; engn = __ffs64(todo), todo; todo &= ~(1 << engn)) gk104_fifo_recover_work()
107 engm |= 1 << gk104_fifo_subdev_engine(engn); gk104_fifo_recover_work()
110 for (todo = mask; engn = __ffs64(todo), todo; todo &= ~(1 << engn)) { gk104_fifo_recover_work()
111 if ((engine = nvkm_device_engine(device, engn))) { gk104_fifo_recover_work()
115 gk104_fifo_runlist_update(fifo, gk104_fifo_subdev_engine(engn)); gk104_fifo_recover_work()
179 u32 engn; gk104_fifo_intr_sched_ctxsw() local
182 for (engn = 0; engn < ARRAY_SIZE(fifo->engine); engn++) { gk104_fifo_intr_sched_ctxsw()
183 u32 stat = nvkm_rd32(device, 0x002640 + (engn * 0x04)); gk104_fifo_intr_sched_ctxsw()
194 list_for_each_entry(chan, &fifo->engine[engn].chan, head) { gk104_fifo_intr_sched_ctxsw()
196 engine = gk104_fifo_engine(fifo, engn); gk104_fifo_intr_sched_ctxsw()
524 u32 engn = __ffs(mask); gk104_fifo_intr_runlist() local
525 wake_up(&fifo->engine[engn].wait); gk104_fifo_intr_runlist()
526 nvkm_wr32(device, 0x002a00, 1 << engn); gk104_fifo_intr_runlist()
527 mask &= ~(1 << engn); gk104_fifo_intr_runlist()
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| H A D | gpfifogf100.c | 93 u64 addr = chan->engn[engine->subdev.index].vma.offset; gf100_fifo_gpfifo_engine_init()
108 nvkm_gpuobj_unmap(&chan->engn[engine->subdev.index].vma); gf100_fifo_gpfifo_engine_dtor()
109 nvkm_gpuobj_del(&chan->engn[engine->subdev.index].inst); gf100_fifo_gpfifo_engine_dtor()
118 int engn = engine->subdev.index; gf100_fifo_gpfifo_engine_ctor() local
124 ret = nvkm_object_bind(object, NULL, 0, &chan->engn[engn].inst); gf100_fifo_gpfifo_engine_ctor()
128 return nvkm_gpuobj_map(chan->engn[engn].inst, chan->vm, gf100_fifo_gpfifo_engine_ctor()
129 NV_MEM_ACCESS_RW, &chan->engn[engn].vma); gf100_fifo_gpfifo_engine_ctor()
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| H A D | channv50.c | 106 struct nvkm_gpuobj *engn = chan->engn[engine->subdev.index]; nv50_fifo_chan_engine_init() local
113 limit = engn->addr + engn->size - 1; nv50_fifo_chan_engine_init()
114 start = engn->addr; nv50_fifo_chan_engine_init()
133 nvkm_gpuobj_del(&chan->engn[engine->subdev.index]); nv50_fifo_chan_engine_dtor()
142 int engn = engine->subdev.index; nv50_fifo_chan_engine_ctor() local
147 return nvkm_object_bind(object, NULL, 0, &chan->engn[engn]); nv50_fifo_chan_engine_ctor()
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| H A D | channv50.h | 18 struct nvkm_gpuobj *engn[NVKM_SUBDEV_NR]; member in struct:nv50_fifo_chan
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| H A D | gpfifogk104.c | 106 u64 addr = chan->engn[engine->subdev.index].vma.offset; gk104_fifo_gpfifo_engine_init()
121 nvkm_gpuobj_unmap(&chan->engn[engine->subdev.index].vma); gk104_fifo_gpfifo_engine_dtor()
122 nvkm_gpuobj_del(&chan->engn[engine->subdev.index].inst); gk104_fifo_gpfifo_engine_dtor()
131 int engn = engine->subdev.index; gk104_fifo_gpfifo_engine_ctor() local
137 ret = nvkm_object_bind(object, NULL, 0, &chan->engn[engn].inst); gk104_fifo_gpfifo_engine_ctor()
141 return nvkm_gpuobj_map(chan->engn[engn].inst, chan->vm, gk104_fifo_gpfifo_engine_ctor()
142 NV_MEM_ACCESS_RW, &chan->engn[engn].vma); gk104_fifo_gpfifo_engine_ctor()
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| H A D | dmanv40.c | 99 inst = chan->engn[engine->subdev.index]->addr >> 4; nv40_fifo_dma_engine_init()
121 nvkm_gpuobj_del(&chan->engn[engine->subdev.index]); nv40_fifo_dma_engine_dtor()
130 const int engn = engine->subdev.index; nv40_fifo_dma_engine_ctor() local
136 return nvkm_object_bind(object, NULL, 0, &chan->engn[engn]); nv40_fifo_dma_engine_ctor()
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| H A D | base.c | 163 const struct nvkm_fifo_chan_oclass *sclass = oclass->engn; nvkm_fifo_class_new()
184 oclass->engn = sclass; nvkm_fifo_class_get()
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| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/sw/ |
| H A D | base.c | 54 const struct nvkm_sw_chan_sclass *sclass = oclass->engn; nvkm_sw_oclass_new()
66 oclass->engn = &sw->func->sclass[index]; nvkm_sw_oclass_get()
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| /linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/engine/ |
| H A D | fifo.h | 29 struct nvkm_fifo_engn engn[NVKM_SUBDEV_NR]; member in struct:nvkm_fifo_chan
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| /linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/core/ |
| H A D | object.h | 79 const void *engn; member in struct:nvkm_oclass
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| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/dma/ |
| H A D | base.c | 114 sclass->engn = oclass; nvkm_dma_oclass_base_get()
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| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| H A D | base.c | 160 const struct nvkm_disp_oclass *sclass = oclass->engn; nvkm_disp_class_new()
194 oclass->engn = root; nvkm_disp_class_get()
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