Searched refs:dcfg (Results 1 - 13 of 13) sorted by relevance

/linux-4.4.14/drivers/video/fbdev/geode/
H A Dvideo_cs5530.c102 u32 dcfg; cs5530_configure_display() local
104 dcfg = readl(par->vid_regs + CS5530_DISPLAY_CONFIG); cs5530_configure_display()
107 dcfg &= ~(CS5530_DCFG_CRT_SYNC_SKW_MASK | CS5530_DCFG_PWR_SEQ_DLY_MASK cs5530_configure_display()
114 dcfg |= (CS5530_DCFG_CRT_SYNC_SKW_INIT | CS5530_DCFG_PWR_SEQ_DLY_INIT cs5530_configure_display()
119 dcfg |= CS5530_DCFG_DAC_PWR_EN; cs5530_configure_display()
120 dcfg |= CS5530_DCFG_HSYNC_EN | CS5530_DCFG_VSYNC_EN; cs5530_configure_display()
124 dcfg |= CS5530_DCFG_FP_PWR_EN; cs5530_configure_display()
125 dcfg |= CS5530_DCFG_FP_DATA_EN; cs5530_configure_display()
130 dcfg |= CS5530_DCFG_CRT_HSYNC_POL; cs5530_configure_display()
132 dcfg |= CS5530_DCFG_CRT_VSYNC_POL; cs5530_configure_display()
134 writel(dcfg, par->vid_regs + CS5530_DISPLAY_CONFIG); cs5530_configure_display()
140 u32 dcfg; cs5530_blank_display() local
163 dcfg = readl(par->vid_regs + CS5530_DISPLAY_CONFIG); cs5530_blank_display()
165 dcfg &= ~(CS5530_DCFG_DAC_BL_EN | CS5530_DCFG_DAC_PWR_EN cs5530_blank_display()
171 dcfg |= CS5530_DCFG_DAC_BL_EN | CS5530_DCFG_DAC_PWR_EN; cs5530_blank_display()
173 dcfg |= CS5530_DCFG_HSYNC_EN; cs5530_blank_display()
175 dcfg |= CS5530_DCFG_VSYNC_EN; cs5530_blank_display()
179 dcfg |= CS5530_DCFG_FP_DATA_EN; cs5530_blank_display()
181 dcfg |= CS5530_DCFG_FP_PWR_EN; cs5530_blank_display()
184 writel(dcfg, par->vid_regs + CS5530_DISPLAY_CONFIG); cs5530_blank_display()
H A Dvideo_gx.c239 u32 dcfg, misc; gx_configure_display() local
242 dcfg = read_vp(par, VP_DCFG); gx_configure_display()
245 dcfg &= ~(VP_DCFG_VSYNC_EN | VP_DCFG_HSYNC_EN); gx_configure_display()
246 write_vp(par, VP_DCFG, dcfg); gx_configure_display()
249 dcfg &= ~(VP_DCFG_CRT_SYNC_SKW gx_configure_display()
254 dcfg |= VP_DCFG_CRT_SYNC_SKW_DEFAULT; gx_configure_display()
257 dcfg |= VP_DCFG_HSYNC_EN | VP_DCFG_VSYNC_EN; gx_configure_display()
274 dcfg |= VP_DCFG_CRT_HSYNC_POL; gx_configure_display()
276 dcfg |= VP_DCFG_CRT_VSYNC_POL; gx_configure_display()
286 dcfg |= VP_DCFG_CRT_EN | VP_DCFG_DAC_BL_EN; gx_configure_display()
290 write_vp(par, VP_DCFG, dcfg); gx_configure_display()
301 u32 dcfg, fp_pm; gx_blank_display() local
324 dcfg = read_vp(par, VP_DCFG); gx_blank_display()
325 dcfg &= ~(VP_DCFG_DAC_BL_EN | VP_DCFG_HSYNC_EN | VP_DCFG_VSYNC_EN | gx_blank_display()
328 dcfg |= VP_DCFG_DAC_BL_EN; gx_blank_display()
330 dcfg |= VP_DCFG_HSYNC_EN; gx_blank_display()
332 dcfg |= VP_DCFG_VSYNC_EN; gx_blank_display()
334 dcfg |= VP_DCFG_CRT_EN; gx_blank_display()
335 write_vp(par, VP_DCFG, dcfg); gx_blank_display()
H A Ddisplay_gx.c64 u32 gcfg, dcfg; gx_set_mode() local
72 dcfg = read_dc(par, DC_DISPLAY_CFG); gx_set_mode()
75 dcfg &= ~DC_DISPLAY_CFG_TGEN; gx_set_mode()
76 write_dc(par, DC_DISPLAY_CFG, dcfg); gx_set_mode()
95 dcfg = 0; gx_set_mode()
112 dcfg |= DC_DISPLAY_CFG_GDEN | DC_DISPLAY_CFG_VDEN | gx_set_mode()
118 dcfg |= DC_DISPLAY_CFG_DISP_MODE_8BPP; gx_set_mode()
121 dcfg |= DC_DISPLAY_CFG_DISP_MODE_16BPP; gx_set_mode()
124 dcfg |= DC_DISPLAY_CFG_DISP_MODE_24BPP; gx_set_mode()
125 dcfg |= DC_DISPLAY_CFG_PALB; gx_set_mode()
130 dcfg |= DC_DISPLAY_CFG_TGEN; gx_set_mode()
162 write_dc(par, DC_DISPLAY_CFG, dcfg); gx_set_mode()
H A Dlxfb_ops.c352 unsigned int gcfg, dcfg; lx_set_mode() local
441 dcfg = DC_DISPLAY_CFG_VDEN; /* Enable video data */ lx_set_mode()
442 dcfg |= DC_DISPLAY_CFG_GDEN; /* Enable graphics */ lx_set_mode()
443 dcfg |= DC_DISPLAY_CFG_TGEN; /* Turn on the timing generator */ lx_set_mode()
444 dcfg |= DC_DISPLAY_CFG_TRUP; /* Update timings immediately */ lx_set_mode()
445 dcfg |= DC_DISPLAY_CFG_PALB; /* Palette bypass in > 8 bpp modes */ lx_set_mode()
446 dcfg |= DC_DISPLAY_CFG_VISL; lx_set_mode()
447 dcfg |= DC_DISPLAY_CFG_DCEN; /* Always center the display */ lx_set_mode()
453 dcfg |= DC_DISPLAY_CFG_DISP_MODE_8BPP; lx_set_mode()
457 dcfg |= DC_DISPLAY_CFG_DISP_MODE_16BPP; lx_set_mode()
462 dcfg |= DC_DISPLAY_CFG_DISP_MODE_24BPP; lx_set_mode()
501 write_dc(par, DC_DISPLAY_CFG, dcfg); lx_set_mode()
528 u32 dcfg, misc, fp_pm; lx_blank_display() local
552 dcfg = read_vp(par, VP_DCFG); lx_blank_display()
553 dcfg &= ~(VP_DCFG_DAC_BL_EN | VP_DCFG_HSYNC_EN | VP_DCFG_VSYNC_EN | lx_blank_display()
556 dcfg |= VP_DCFG_DAC_BL_EN | VP_DCFG_CRT_EN; lx_blank_display()
558 dcfg |= VP_DCFG_HSYNC_EN; lx_blank_display()
560 dcfg |= VP_DCFG_VSYNC_EN; lx_blank_display()
562 write_vp(par, VP_DCFG, dcfg); lx_blank_display()
/linux-4.4.14/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_dcb_nl.c51 struct ixgbe_dcb_config *dcfg = &adapter->dcb_cfg; ixgbe_copy_dcb_cfg() local
71 dst = &dcfg->tc_config[i - DCB_PG_ATTR_TC_0]; ixgbe_copy_dcb_cfg()
120 if (dcfg->bw_percentage[tx][j] != scfg->bw_percentage[tx][j]) { ixgbe_copy_dcb_cfg()
121 dcfg->bw_percentage[tx][j] = scfg->bw_percentage[tx][j]; ixgbe_copy_dcb_cfg()
124 if (dcfg->bw_percentage[rx][j] != scfg->bw_percentage[rx][j]) { ixgbe_copy_dcb_cfg()
125 dcfg->bw_percentage[rx][j] = scfg->bw_percentage[rx][j]; ixgbe_copy_dcb_cfg()
132 if (dcfg->tc_config[j].dcb_pfc != scfg->tc_config[j].dcb_pfc) { ixgbe_copy_dcb_cfg()
133 dcfg->tc_config[j].dcb_pfc = scfg->tc_config[j].dcb_pfc; ixgbe_copy_dcb_cfg()
138 if (dcfg->pfc_mode_enable != scfg->pfc_mode_enable) { ixgbe_copy_dcb_cfg()
139 dcfg->pfc_mode_enable = scfg->pfc_mode_enable; ixgbe_copy_dcb_cfg()
/linux-4.4.14/arch/arm/mach-imx/
H A Dplatsmp.c116 np = of_find_compatible_node(NULL, NULL, "fsl,ls1021a-dcfg"); ls1021a_smp_prepare_cpus()
/linux-4.4.14/arch/cris/arch-v32/drivers/
H A Dcryptocop.c985 struct cryptocop_desc_cfg *dcfg = odsc->cfg; cryptocop_setup_dma_list() local
994 while (dcfg) { cryptocop_setup_dma_list()
999 if (digest_ctx.tcfg && (digest_ctx.tcfg->tid == dcfg->tid)){ cryptocop_setup_dma_list()
1001 } else if (cipher_ctx.tcfg && (cipher_ctx.tcfg->tid == dcfg->tid)){ cryptocop_setup_dma_list()
1003 } else if (csum_ctx.tcfg && (csum_ctx.tcfg->tid == dcfg->tid)){ cryptocop_setup_dma_list()
1007 DEBUG_API(printk("cryptocop_setup_dma_list: invalid transform %d specified in descriptor.\n", dcfg->tid)); cryptocop_setup_dma_list()
1012 DEBUG_API(printk("cryptocop_setup_dma_list: completed transform %d reused.\n", dcfg->tid)); cryptocop_setup_dma_list()
1024 switch (dcfg->src){ cryptocop_setup_dma_list()
1044 DEBUG_API(printk("cryptocop_setup_dma_list: bad unit source configured %d.\n", dcfg->src)); cryptocop_setup_dma_list()
1082 if (dcfg->last) { cryptocop_setup_dma_list()
1086 dcfg = dcfg->next; cryptocop_setup_dma_list()
1087 } /* while (dcfg) */ cryptocop_setup_dma_list()
/linux-4.4.14/drivers/usb/dwc3/
H A Dcore.h675 * @dcfg: saved contents of DCFG register
773 u32 dcfg; member in struct:dwc3
H A Dgadget.c2882 dwc->dcfg = dwc3_readl(dwc->regs, DWC3_DCFG); dwc3_gadget_suspend()
2911 dwc3_writel(dwc->regs, DWC3_DCFG, dwc->dcfg); dwc3_gadget_resume()
/linux-4.4.14/drivers/net/ethernet/cadence/
H A Dmacb.c2222 u32 dcfg; macb_configure_caps() local
2230 dcfg = gem_readl(bp, DCFG1); macb_configure_caps()
2231 if (GEM_BFEXT(IRQCOR, dcfg) == 0) macb_configure_caps()
2233 dcfg = gem_readl(bp, DCFG2); macb_configure_caps()
2234 if ((dcfg & (GEM_BIT(RX_PKT_BUFF) | GEM_BIT(TX_PKT_BUFF))) == 0) macb_configure_caps()
/linux-4.4.14/drivers/usb/dwc2/
H A Dcore.h518 * @dcfg: Backup of DCFG register
531 u32 dcfg; member in struct:dwc2_dregs_backup
H A Dgadget.c1203 u32 dcfg; dwc2_hsotg_process_control() local
1225 dcfg = dwc2_readl(hsotg->regs + DCFG); dwc2_hsotg_process_control()
1226 dcfg &= ~DCFG_DEVADDR_MASK; dwc2_hsotg_process_control()
1227 dcfg |= (le16_to_cpu(ctrl->wValue) << dwc2_hsotg_process_control()
1229 dwc2_writel(dcfg, hsotg->regs + DCFG); dwc2_hsotg_process_control()
H A Dcore.c150 dr->dcfg = dwc2_readl(hsotg->regs + DCFG); dwc2_backup_device_registers()
209 dwc2_writel(dr->dcfg, hsotg->regs + DCFG); dwc2_restore_device_registers()

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