| /linux-4.4.14/drivers/clk/meson/ |
| H A D | clkc.h | 90 enum clk_type { enum
100 enum clk_type clk_type; member in struct:clk_conf
118 .clk_type = CLK_FIXED_RATE, \
127 .clk_type = CLK_FIXED_RATE, \
137 .clk_type = CLK_PLL, \
148 .clk_type = CLK_FIXED_FACTOR, \
159 .clk_type = CLK_CPU, \
170 .clk_type = CLK_COMPOSITE, \
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| H A D | clkc.c | 210 switch (clk_conf->clk_type) { meson_clk_register_clks()
237 clk_conf->clk_type); meson_clk_register_clks()
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| /linux-4.4.14/drivers/nfc/s3fwrn5/ |
| H A D | nci.h | 75 __u8 clk_type; member in struct:nci_prop_fw_cfg_cmd
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| H A D | nci.c | 112 fw_cfg.clk_type = 0x01; s3fwrn5_nci_rf_configure()
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| /linux-4.4.14/drivers/input/ |
| H A D | evdev.c | 59 unsigned int clk_type; member in struct:evdev_client
161 time = client->clk_type == EV_CLK_REAL ? __evdev_queue_syn_dropped()
163 client->clk_type == EV_CLK_MONO ? __evdev_queue_syn_dropped()
194 unsigned int clk_type; evdev_set_clk_type() local
199 clk_type = EV_CLK_REAL; evdev_set_clk_type()
202 clk_type = EV_CLK_MONO; evdev_set_clk_type()
205 clk_type = EV_CLK_BOOT; evdev_set_clk_type()
211 if (client->clk_type != clk_type) { evdev_set_clk_type()
212 client->clk_type = clk_type; evdev_set_clk_type()
270 event.time = ktime_to_timeval(ev_time[client->clk_type]); evdev_pass_values()
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| /linux-4.4.14/drivers/phy/ |
| H A D | phy-xgene.c | 546 enum clk_type_t clk_type; /* Input clock selection */ member in struct:xgene_phy_ctx
717 enum clk_type_t clk_type) xgene_phy_cfg_cmu_clk_type()
730 if (clk_type == CLK_EXT_DIFF) { xgene_phy_cfg_cmu_clk_type()
740 } else if (clk_type == CLK_INT_DIFF) { xgene_phy_cfg_cmu_clk_type()
750 } else if (clk_type == CLK_INT_SING) { xgene_phy_cfg_cmu_clk_type()
771 enum clk_type_t clk_type) xgene_phy_sata_cfg_cmu_core()
817 if (clk_type == CLK_EXT_DIFF) xgene_phy_sata_cfg_cmu_core()
1147 enum clk_type_t clk_type) xgene_phy_cal_rdy_chk()
1247 enum clk_type_t clk_type) xgene_phy_pdwn_force_vco()
1264 enum clk_type_t clk_type, int ssc_enable) xgene_phy_hw_init_sata()
1294 xgene_phy_cfg_cmu_clk_type(ctx, PHY_CMU, clk_type); xgene_phy_hw_init_sata()
1297 xgene_phy_sata_cfg_cmu_core(ctx, PHY_CMU, clk_type); xgene_phy_hw_init_sata()
1315 if (!xgene_phy_cal_rdy_chk(ctx, PHY_CMU, clk_type)) xgene_phy_hw_init_sata()
1318 xgene_phy_pdwn_force_vco(ctx, PHY_CMU, clk_type); xgene_phy_hw_init_sata()
1328 enum clk_type_t clk_type, xgene_phy_hw_initialize()
1333 dev_dbg(ctx->dev, "PHY init clk type %d\n", clk_type); xgene_phy_hw_initialize()
1336 rc = xgene_phy_hw_init_sata(ctx, clk_type, ssc_enable); xgene_phy_hw_initialize()
715 xgene_phy_cfg_cmu_clk_type(struct xgene_phy_ctx *ctx, enum cmu_type_t cmu_type, enum clk_type_t clk_type) xgene_phy_cfg_cmu_clk_type() argument
769 xgene_phy_sata_cfg_cmu_core(struct xgene_phy_ctx *ctx, enum cmu_type_t cmu_type, enum clk_type_t clk_type) xgene_phy_sata_cfg_cmu_core() argument
1145 xgene_phy_cal_rdy_chk(struct xgene_phy_ctx *ctx, enum cmu_type_t cmu_type, enum clk_type_t clk_type) xgene_phy_cal_rdy_chk() argument
1245 xgene_phy_pdwn_force_vco(struct xgene_phy_ctx *ctx, enum cmu_type_t cmu_type, enum clk_type_t clk_type) xgene_phy_pdwn_force_vco() argument
1263 xgene_phy_hw_init_sata(struct xgene_phy_ctx *ctx, enum clk_type_t clk_type, int ssc_enable) xgene_phy_hw_init_sata() argument
1327 xgene_phy_hw_initialize(struct xgene_phy_ctx *ctx, enum clk_type_t clk_type, int ssc_enable) xgene_phy_hw_initialize() argument
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| /linux-4.4.14/drivers/clk/ |
| H A D | clk-u300.c | 876 u32 clk_type; of_u300_syscon_clk_init() local
880 if (of_property_read_u32(np, "clock-type", &clk_type)) { of_u300_syscon_clk_init()
892 switch (clk_type) { of_u300_syscon_clk_init()
906 pr_err("unknown clock type %x specified\n", clk_type); of_u300_syscon_clk_init()
913 if (u3clk->type == clk_type && u3clk->id == clk_id) of_u300_syscon_clk_init()
930 if (clk_type == U300_CLK_TYPE_REST && clk_id == 5) of_u300_syscon_clk_init()
932 if (clk_type == U300_CLK_TYPE_REST && clk_id == 9) of_u300_syscon_clk_init()
934 if (clk_type == U300_CLK_TYPE_REST && clk_id == 12) of_u300_syscon_clk_init()
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| /linux-4.4.14/drivers/video/fbdev/aty/ |
| H A D | atyfb_base.c | 2353 u8 dac_type, dac_subtype, clk_type; aty_init() local
2361 clk_type = CLK_ATI18818_1; aty_init()
2370 clk_type = CLK_IBMRGB514; aty_init()
2391 switch (clk_type) { aty_init()
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