Searched refs:clk_phase (Results 1 - 6 of 6) sorted by relevance
| /linux-4.4.14/drivers/clk/socfpga/ |
| H A D | clk-gate-a10.c | 54 u32 clk_phase[2]; socfpga_clk_prepare() local
56 if (socfpgaclk->clk_phase[0] || socfpgaclk->clk_phase[1]) { socfpga_clk_prepare()
57 for (i = 0; i < ARRAY_SIZE(clk_phase); i++) { socfpga_clk_prepare()
58 switch (socfpgaclk->clk_phase[i]) { socfpga_clk_prepare()
60 clk_phase[i] = 0; socfpga_clk_prepare()
63 clk_phase[i] = 1; socfpga_clk_prepare()
66 clk_phase[i] = 2; socfpga_clk_prepare()
69 clk_phase[i] = 3; socfpga_clk_prepare()
72 clk_phase[i] = 4; socfpga_clk_prepare()
75 clk_phase[i] = 5; socfpga_clk_prepare()
78 clk_phase[i] = 6; socfpga_clk_prepare()
81 clk_phase[i] = 7; socfpga_clk_prepare()
84 clk_phase[i] = 0; socfpga_clk_prepare()
89 hs_timing = SYSMGR_SDMMC_CTRL_SET(clk_phase[0], clk_phase[1]); socfpga_clk_prepare()
94 pr_err("%s: cannot set clk_phase because sys_mgr_base_addr is not available!\n", socfpga_clk_prepare()
110 u32 clk_phase[2]; __socfpga_gate_init() local
151 rc = of_property_read_u32_array(node, "clk-phase", clk_phase, 2); __socfpga_gate_init()
153 socfpga_clk->clk_phase[0] = clk_phase[0]; __socfpga_gate_init()
154 socfpga_clk->clk_phase[1] = clk_phase[1]; __socfpga_gate_init()
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| H A D | clk-gate.c | 125 u32 clk_phase[2]; socfpga_clk_prepare() local
127 if (socfpgaclk->clk_phase[0] || socfpgaclk->clk_phase[1]) { socfpga_clk_prepare()
135 switch (socfpgaclk->clk_phase[i]) { socfpga_clk_prepare()
137 clk_phase[i] = 0; socfpga_clk_prepare()
140 clk_phase[i] = 1; socfpga_clk_prepare()
143 clk_phase[i] = 2; socfpga_clk_prepare()
146 clk_phase[i] = 3; socfpga_clk_prepare()
149 clk_phase[i] = 4; socfpga_clk_prepare()
152 clk_phase[i] = 5; socfpga_clk_prepare()
155 clk_phase[i] = 6; socfpga_clk_prepare()
158 clk_phase[i] = 7; socfpga_clk_prepare()
161 clk_phase[i] = 0; socfpga_clk_prepare()
165 hs_timing = SYSMGR_SDMMC_CTRL_SET(clk_phase[0], clk_phase[1]); socfpga_clk_prepare()
184 u32 clk_phase[2]; __socfpga_gate_init() local
224 rc = of_property_read_u32_array(node, "clk-phase", clk_phase, 2); __socfpga_gate_init()
226 socfpga_clk->clk_phase[0] = clk_phase[0]; __socfpga_gate_init()
227 socfpga_clk->clk_phase[1] = clk_phase[1]; __socfpga_gate_init()
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| H A D | clk.h | 57 u32 clk_phase[2]; member in struct:socfpga_gate_clk
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| /linux-4.4.14/include/trace/events/ |
| H A D | clk.h | 162 DECLARE_EVENT_CLASS(clk_phase,
181 DEFINE_EVENT(clk_phase, clk_set_phase,
188 DEFINE_EVENT(clk_phase, clk_set_phase_complete,
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| /linux-4.4.14/sound/soc/codecs/ |
| H A D | lm49453.c | 1149 int clk_phase = 0; lm49453_set_dai_fmt() local
1176 clk_phase = (1 << 5); lm49453_set_dai_fmt()
1181 clk_phase = (1 << 5); lm49453_set_dai_fmt()
1190 (aif_val | mode | clk_phase)); lm49453_set_dai_fmt()
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| /linux-4.4.14/drivers/clk/ |
| H A D | clk.c | 2131 d = debugfs_create_u32("clk_phase", S_IRUGO, core->dentry, clk_debug_create_one()
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