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Searched refs:cg_sel (Results 1 – 3 of 3) sorted by relevance

/linux-4.4.14/drivers/clk/ux500/
Dclk-prcmu.c21 u8 cg_sel; member
34 ret = prcmu_request_clock(clk->cg_sel, true); in clk_prcmu_prepare()
44 if (prcmu_request_clock(clk->cg_sel, false)) in clk_prcmu_unprepare()
80 return prcmu_clock_rate(clk->cg_sel); in clk_prcmu_recalc_rate()
87 return prcmu_round_clock_rate(clk->cg_sel, rate); in clk_prcmu_round_rate()
94 return prcmu_set_clock_rate(clk->cg_sel, rate); in clk_prcmu_set_rate()
114 err = prcmu_request_clock(clk->cg_sel, true); in clk_prcmu_opp_prepare()
130 if (prcmu_request_clock(clk->cg_sel, false)) { in clk_prcmu_opp_unprepare()
160 err = prcmu_request_clock(clk->cg_sel, true); in clk_prcmu_opp_volt_prepare()
175 if (prcmu_request_clock(clk->cg_sel, false)) { in clk_prcmu_opp_volt_unprepare()
[all …]
Dclk-prcc.c30 u32 cg_sel; member
40 writel(clk->cg_sel, (clk->base + PRCC_PCKEN)); in clk_prcc_pclk_enable()
41 while (!(readl(clk->base + PRCC_PCKSR) & clk->cg_sel)) in clk_prcc_pclk_enable()
52 writel(clk->cg_sel, (clk->base + PRCC_PCKDIS)); in clk_prcc_pclk_disable()
60 writel(clk->cg_sel, (clk->base + PRCC_KCKEN)); in clk_prcc_kclk_enable()
61 while (!(readl(clk->base + PRCC_KCKSR) & clk->cg_sel)) in clk_prcc_kclk_enable()
72 writel(clk->cg_sel, (clk->base + PRCC_KCKDIS)); in clk_prcc_kclk_disable()
97 u32 cg_sel, in clk_reg_prcc() argument
120 clk->cg_sel = cg_sel; in clk_reg_prcc()
147 u32 cg_sel, in clk_reg_prcc_pclk() argument
[all …]
Dclk.h21 u32 cg_sel,
27 u32 cg_sel,
32 u8 cg_sel,
38 u8 cg_sel,
43 u8 cg_sel,
49 u8 cg_sel,
54 u8 cg_sel,
59 u8 cg_sel,