Searched refs:cdm (Results 1 - 9 of 9) sorted by relevance

/linux-4.4.14/arch/powerpc/platforms/52xx/
H A Dlite5200.c38 { .compatible = "fsl,mpc5200-cdm", },
39 { .compatible = "mpc5200-cdm", },
60 struct mpc52xx_cdm __iomem *cdm; lite5200_fix_clock_config() local
63 cdm = of_iomap(np, 0); lite5200_fix_clock_config()
65 if (!cdm) { lite5200_fix_clock_config()
72 out_8(&cdm->ext_48mhz_en, 0x00); lite5200_fix_clock_config()
73 out_8(&cdm->fd_enable, 0x01); lite5200_fix_clock_config()
74 if (in_be32(&cdm->rstcfg) & 0x40) /* Assumes 33Mhz clock */ lite5200_fix_clock_config()
75 out_be16(&cdm->fd_counters, 0x0001); lite5200_fix_clock_config()
77 out_be16(&cdm->fd_counters, 0x5555); lite5200_fix_clock_config()
80 iounmap(cdm); lite5200_fix_clock_config()
H A Dmpc52xx_pm.c18 static struct mpc52xx_cdm __iomem *cdm; variable in typeref:struct:__iomem
87 cdm = mbar + 0x200; mpc52xx_pm_prepare()
134 out_8(&cdm->ccs_sleep_enable, 1); mpc52xx_pm_enter()
135 out_8(&cdm->osc_sleep_enable, 1); mpc52xx_pm_enter()
136 out_8(&cdm->ccs_qreq_test, 1); mpc52xx_pm_enter()
139 clk_enables = in_be32(&cdm->clk_enables); mpc52xx_pm_enter()
140 out_be32(&cdm->clk_enables, clk_enables & 0x00088000); mpc52xx_pm_enter()
156 mpc52xx_deep_sleep(sram, sdram, cdm, intr); mpc52xx_pm_enter()
167 out_be32(&cdm->clk_enables, clk_enables); mpc52xx_pm_enter()
168 out_8(&cdm->ccs_sleep_enable, 0); mpc52xx_pm_enter()
169 out_8(&cdm->osc_sleep_enable, 0); mpc52xx_pm_enter()
H A Dlite5200_pm.c11 static struct mpc52xx_cdm __iomem *cdm; variable in typeref:struct:__iomem
77 cdm = mbar + 0x200; lite5200_pm_prepare()
102 _memcpy_fromio(&scdm, cdm, sizeof(*cdm)); lite5200_save_regs()
138 out_8(&cdm->ipb_clk_sel, scdm.ipb_clk_sel); lite5200_restore_regs()
139 out_8(&cdm->pci_clk_sel, scdm.pci_clk_sel); lite5200_restore_regs()
141 out_8(&cdm->ext_48mhz_en, scdm.ext_48mhz_en); lite5200_restore_regs()
142 out_8(&cdm->fd_enable, scdm.fd_enable); lite5200_restore_regs()
143 out_be16(&cdm->fd_counters, scdm.fd_counters); lite5200_restore_regs()
145 out_be32(&cdm->clk_enables, scdm.clk_enables); lite5200_restore_regs()
147 out_8(&cdm->osc_disable, scdm.osc_disable); lite5200_restore_regs()
149 out_be16(&cdm->mclken_div_psc1, scdm.mclken_div_psc1); lite5200_restore_regs()
150 out_be16(&cdm->mclken_div_psc2, scdm.mclken_div_psc2); lite5200_restore_regs()
151 out_be16(&cdm->mclken_div_psc3, scdm.mclken_div_psc3); lite5200_restore_regs()
152 out_be16(&cdm->mclken_div_psc6, scdm.mclken_div_psc6); lite5200_restore_regs()
H A Dmpc52xx_sleep.S89 lwz r8, 0x14(r5) /* cdm->clkenable */
H A Dmpc52xx_common.c117 { .compatible = "fsl,mpc5200-cdm", },
118 { .compatible = "mpc5200-cdm", }, /* old */
/linux-4.4.14/drivers/spi/
H A Dspi-ppc4xx.c111 u8 cdm; member in struct:spi_ppc4xx_regs
174 u8 cdm = 0; spi_ppc4xx_setupxfer() local
206 cdm = min(scr, 0xff); spi_ppc4xx_setupxfer()
208 dev_dbg(&spi->dev, "setting pre-scaler to %d (hz %d)\n", cdm, speed); spi_ppc4xx_setupxfer()
210 if (in_8(&hw->regs->cdm) != cdm) spi_ppc4xx_setupxfer()
211 out_8(&hw->regs->cdm, cdm); spi_ppc4xx_setupxfer()
/linux-4.4.14/drivers/net/can/mscan/
H A Dmpc5xxx_can.c47 { .compatible = "fsl,mpc5200-cdm", },
55 struct mpc52xx_cdm __iomem *cdm; mpc52xx_can_get_clock() local
88 cdm = of_iomap(np_cdm, 0); mpc52xx_can_get_clock()
90 if (in_8(&cdm->ipb_clk_sel) & 0x1) mpc52xx_can_get_clock()
92 val = in_be32(&cdm->rstcfg); mpc52xx_can_get_clock()
98 iounmap(cdm); mpc52xx_can_get_clock()
/linux-4.4.14/drivers/gpu/drm/msm/mdp/mdp5/
H A Dmdp5_cfg.h93 struct mdp5_sub_block cdm; member in struct:mdp5_cfg_hw
H A Dmdp5_cfg.c448 .cdm = {

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