| H A D | arm-ccn.c | 369 struct arm_ccn *ccn = pmu_to_arm_ccn(dev_get_drvdata(dev)); arm_ccn_pmu_events_is_visible() local
375 if (event->type == CCN_TYPE_SBAS && !ccn->sbas_present) arm_ccn_pmu_events_is_visible()
377 if (event->type == CCN_TYPE_SBSX && !ccn->sbsx_present) arm_ccn_pmu_events_is_visible()
450 static u64 *arm_ccn_pmu_get_cmp_mask(struct arm_ccn *ccn, const char *name) arm_ccn_pmu_get_cmp_mask() argument
460 return &ccn->dt.cmp_mask[i].l; arm_ccn_pmu_get_cmp_mask()
462 return &ccn->dt.cmp_mask[i].h; arm_ccn_pmu_get_cmp_mask()
471 struct arm_ccn *ccn = pmu_to_arm_ccn(dev_get_drvdata(dev)); arm_ccn_pmu_cmp_mask_show() local
472 u64 *mask = arm_ccn_pmu_get_cmp_mask(ccn, attr->attr.name); arm_ccn_pmu_cmp_mask_show()
480 struct arm_ccn *ccn = pmu_to_arm_ccn(dev_get_drvdata(dev)); arm_ccn_pmu_cmp_mask_store() local
481 u64 *mask = arm_ccn_pmu_get_cmp_mask(ccn, attr->attr.name); arm_ccn_pmu_cmp_mask_store()
548 struct arm_ccn *ccn = pmu_to_arm_ccn(dev_get_drvdata(dev)); arm_ccn_pmu_cpumask_show() local
550 return cpumap_print_to_pagebuf(true, buf, &ccn->dt.cpu); arm_ccn_pmu_cpumask_show()
633 struct arm_ccn *ccn = pmu_to_arm_ccn(event->pmu); arm_ccn_pmu_event_alloc() local
646 ccn->dt.pmu_counters_mask)) arm_ccn_pmu_event_alloc()
650 ccn->dt.pmu_counters[CCN_IDX_PMU_CYCLE_COUNTER].event = event; arm_ccn_pmu_event_alloc()
656 hw->idx = arm_ccn_pmu_alloc_bit(ccn->dt.pmu_counters_mask, arm_ccn_pmu_event_alloc()
659 dev_dbg(ccn->dev, "No more counters available!\n"); arm_ccn_pmu_event_alloc()
664 source = &ccn->xp[node_xp]; arm_ccn_pmu_event_alloc()
666 source = &ccn->node[node_xp]; arm_ccn_pmu_event_alloc()
667 ccn->dt.pmu_counters[hw->idx].source = source; arm_ccn_pmu_event_alloc()
677 dev_dbg(ccn->dev, "No more event sources/watchpoints on node/XP %d!\n", arm_ccn_pmu_event_alloc()
679 clear_bit(hw->idx, ccn->dt.pmu_counters_mask); arm_ccn_pmu_event_alloc()
684 ccn->dt.pmu_counters[hw->idx].event = event; arm_ccn_pmu_event_alloc()
691 struct arm_ccn *ccn = pmu_to_arm_ccn(event->pmu); arm_ccn_pmu_event_release() local
695 clear_bit(CCN_IDX_PMU_CYCLE_COUNTER, ccn->dt.pmu_counters_mask); arm_ccn_pmu_event_release()
698 ccn->dt.pmu_counters[hw->idx].source; arm_ccn_pmu_event_release()
706 clear_bit(hw->idx, ccn->dt.pmu_counters_mask); arm_ccn_pmu_event_release()
709 ccn->dt.pmu_counters[hw->idx].source = NULL; arm_ccn_pmu_event_release()
710 ccn->dt.pmu_counters[hw->idx].event = NULL; arm_ccn_pmu_event_release()
715 struct arm_ccn *ccn; arm_ccn_pmu_event_init() local
725 ccn = pmu_to_arm_ccn(event->pmu); arm_ccn_pmu_event_init()
728 dev_warn(ccn->dev, "Sampling not supported!\n"); arm_ccn_pmu_event_init()
735 dev_warn(ccn->dev, "Can't exclude execution levels!\n"); arm_ccn_pmu_event_init()
740 dev_warn(ccn->dev, "Can't provide per-task data!\n"); arm_ccn_pmu_event_init()
752 event->cpu = cpumask_first(&ccn->dt.cpu); arm_ccn_pmu_event_init()
761 if (node_xp >= ccn->num_xps) { arm_ccn_pmu_event_init()
762 dev_warn(ccn->dev, "Invalid XP ID %d!\n", node_xp); arm_ccn_pmu_event_init()
769 if (node_xp >= ccn->num_nodes) { arm_ccn_pmu_event_init()
770 dev_warn(ccn->dev, "Invalid node ID %d!\n", node_xp); arm_ccn_pmu_event_init()
773 if (!arm_ccn_pmu_type_eq(type, ccn->node[node_xp].type)) { arm_ccn_pmu_event_init()
774 dev_warn(ccn->dev, "Invalid type 0x%x for node %d!\n", arm_ccn_pmu_event_init()
793 dev_warn(ccn->dev, "Invalid port %d for node/XP %d!\n", arm_ccn_pmu_event_init()
798 dev_warn(ccn->dev, "Invalid vc %d for node/XP %d!\n", arm_ccn_pmu_event_init()
805 dev_warn(ccn->dev, "Invalid event 0x%x for node/XP %d!\n", arm_ccn_pmu_event_init()
840 static u64 arm_ccn_pmu_read_counter(struct arm_ccn *ccn, int idx) arm_ccn_pmu_read_counter() argument
846 res = readq(ccn->dt.base + CCN_DT_PMCCNTR); arm_ccn_pmu_read_counter()
849 writel(0x1, ccn->dt.base + CCN_DT_PMSR_REQ); arm_ccn_pmu_read_counter()
850 while (!(readl(ccn->dt.base + CCN_DT_PMSR) & 0x1)) arm_ccn_pmu_read_counter()
852 writel(0x1, ccn->dt.base + CCN_DT_PMSR_CLR); arm_ccn_pmu_read_counter()
853 res = readl(ccn->dt.base + CCN_DT_PMCCNTRSR + 4) & 0xff; arm_ccn_pmu_read_counter()
855 res |= readl(ccn->dt.base + CCN_DT_PMCCNTRSR); arm_ccn_pmu_read_counter()
858 res = readl(ccn->dt.base + CCN_DT_PMEVCNT(idx)); arm_ccn_pmu_read_counter()
866 struct arm_ccn *ccn = pmu_to_arm_ccn(event->pmu); arm_ccn_pmu_event_update() local
872 new_count = arm_ccn_pmu_read_counter(ccn, hw->idx); arm_ccn_pmu_event_update()
882 struct arm_ccn *ccn = pmu_to_arm_ccn(event->pmu); arm_ccn_pmu_xp_dt_config() local
888 xp = &ccn->xp[CCN_CONFIG_XP(event->attr.config)]; arm_ccn_pmu_xp_dt_config()
890 xp = &ccn->xp[arm_ccn_node_to_xp( arm_ccn_pmu_xp_dt_config()
898 spin_lock(&ccn->dt.config_lock); arm_ccn_pmu_xp_dt_config()
906 spin_unlock(&ccn->dt.config_lock); arm_ccn_pmu_xp_dt_config()
911 struct arm_ccn *ccn = pmu_to_arm_ccn(event->pmu); arm_ccn_pmu_event_start() local
915 arm_ccn_pmu_read_counter(ccn, hw->idx)); arm_ccn_pmu_event_start()
923 if (!ccn->irq) arm_ccn_pmu_event_start()
924 hrtimer_start(&ccn->dt.hrtimer, arm_ccn_pmu_timer_period(), arm_ccn_pmu_event_start()
933 struct arm_ccn *ccn = pmu_to_arm_ccn(event->pmu); arm_ccn_pmu_event_stop() local
940 if (!ccn->irq) arm_ccn_pmu_event_stop()
941 hrtimer_cancel(&ccn->dt.hrtimer); arm_ccn_pmu_event_stop()
944 timeout = arm_ccn_pmu_read_counter(ccn, CCN_IDX_PMU_CYCLE_COUNTER) + arm_ccn_pmu_event_stop()
945 ccn->num_xps; arm_ccn_pmu_event_stop()
946 while (arm_ccn_pmu_read_counter(ccn, CCN_IDX_PMU_CYCLE_COUNTER) < arm_ccn_pmu_event_stop()
958 struct arm_ccn *ccn = pmu_to_arm_ccn(event->pmu); arm_ccn_pmu_xp_watchpoint_config() local
961 ccn->dt.pmu_counters[hw->idx].source; arm_ccn_pmu_xp_watchpoint_config()
966 u64 mask_l = ccn->dt.cmp_mask[CCN_CONFIG_MASK(event->attr.config)].l; arm_ccn_pmu_xp_watchpoint_config()
967 u64 mask_h = ccn->dt.cmp_mask[CCN_CONFIG_MASK(event->attr.config)].h; arm_ccn_pmu_xp_watchpoint_config()
1006 struct arm_ccn *ccn = pmu_to_arm_ccn(event->pmu); arm_ccn_pmu_xp_event_config() local
1009 ccn->dt.pmu_counters[hw->idx].source; arm_ccn_pmu_xp_event_config()
1027 struct arm_ccn *ccn = pmu_to_arm_ccn(event->pmu); arm_ccn_pmu_node_event_config() local
1030 ccn->dt.pmu_counters[hw->idx].source; arm_ccn_pmu_node_event_config()
1064 struct arm_ccn *ccn = pmu_to_arm_ccn(event->pmu); arm_ccn_pmu_event_config() local
1077 spin_lock(&ccn->dt.config_lock); arm_ccn_pmu_event_config()
1081 val = readl(ccn->dt.base + CCN_DT_ACTIVE_DSM + offset); arm_ccn_pmu_event_config()
1085 writel(val, ccn->dt.base + CCN_DT_ACTIVE_DSM + offset); arm_ccn_pmu_event_config()
1097 spin_unlock(&ccn->dt.config_lock); arm_ccn_pmu_event_config()
1178 struct arm_ccn *ccn = container_of(dt, struct arm_ccn, dt); arm_ccn_pmu_cpu_notifier() local
1191 if (ccn->irq) arm_ccn_pmu_cpu_notifier()
1192 WARN_ON(irq_set_affinity(ccn->irq, &dt->cpu) != 0); arm_ccn_pmu_cpu_notifier()
1203 static int arm_ccn_pmu_init(struct arm_ccn *ccn) arm_ccn_pmu_init() argument
1210 ccn->dt.base = ccn->base + CCN_REGION_SIZE; arm_ccn_pmu_init()
1211 spin_lock_init(&ccn->dt.config_lock); arm_ccn_pmu_init()
1212 writel(CCN_DT_PMOVSR_CLR__MASK, ccn->dt.base + CCN_DT_PMOVSR_CLR); arm_ccn_pmu_init()
1213 writel(CCN_DT_CTL__DT_EN, ccn->dt.base + CCN_DT_CTL); arm_ccn_pmu_init()
1215 ccn->dt.base + CCN_DT_PMCR); arm_ccn_pmu_init()
1216 writel(0x1, ccn->dt.base + CCN_DT_PMSR_CLR); arm_ccn_pmu_init()
1217 for (i = 0; i < ccn->num_xps; i++) { arm_ccn_pmu_init()
1218 writel(0, ccn->xp[i].base + CCN_XP_DT_CONFIG); arm_ccn_pmu_init()
1224 ccn->xp[i].base + CCN_XP_DT_CONTROL); arm_ccn_pmu_init()
1226 ccn->dt.cmp_mask[CCN_IDX_MASK_ANY].l = ~0; arm_ccn_pmu_init()
1227 ccn->dt.cmp_mask[CCN_IDX_MASK_ANY].h = ~0; arm_ccn_pmu_init()
1228 ccn->dt.cmp_mask[CCN_IDX_MASK_EXACT].l = 0; arm_ccn_pmu_init()
1229 ccn->dt.cmp_mask[CCN_IDX_MASK_EXACT].h = 0; arm_ccn_pmu_init()
1230 ccn->dt.cmp_mask[CCN_IDX_MASK_ORDER].l = ~0; arm_ccn_pmu_init()
1231 ccn->dt.cmp_mask[CCN_IDX_MASK_ORDER].h = ~(0x1 << 15); arm_ccn_pmu_init()
1232 ccn->dt.cmp_mask[CCN_IDX_MASK_OPCODE].l = ~0; arm_ccn_pmu_init()
1233 ccn->dt.cmp_mask[CCN_IDX_MASK_OPCODE].h = ~(0x1f << 9); arm_ccn_pmu_init()
1236 ccn->dt.id = ida_simple_get(&arm_ccn_pmu_ida, 0, 0, GFP_KERNEL); arm_ccn_pmu_init()
1237 if (ccn->dt.id == 0) { arm_ccn_pmu_init()
1238 name = "ccn"; arm_ccn_pmu_init()
1240 int len = snprintf(NULL, 0, "ccn_%d", ccn->dt.id); arm_ccn_pmu_init()
1242 name = devm_kzalloc(ccn->dev, len + 1, GFP_KERNEL); arm_ccn_pmu_init()
1243 snprintf(name, len + 1, "ccn_%d", ccn->dt.id); arm_ccn_pmu_init()
1247 ccn->dt.pmu = (struct pmu) { arm_ccn_pmu_init()
1259 if (!ccn->irq) { arm_ccn_pmu_init()
1260 dev_info(ccn->dev, "No access to interrupts, using timer.\n"); arm_ccn_pmu_init()
1261 hrtimer_init(&ccn->dt.hrtimer, CLOCK_MONOTONIC, arm_ccn_pmu_init()
1263 ccn->dt.hrtimer.function = arm_ccn_pmu_timer_handler; arm_ccn_pmu_init()
1267 cpumask_set_cpu(smp_processor_id(), &ccn->dt.cpu); arm_ccn_pmu_init()
1273 ccn->dt.cpu_nb.notifier_call = arm_ccn_pmu_cpu_notifier; arm_ccn_pmu_init()
1274 ccn->dt.cpu_nb.priority = CPU_PRI_PERF + 1, arm_ccn_pmu_init()
1275 err = register_cpu_notifier(&ccn->dt.cpu_nb); arm_ccn_pmu_init()
1280 if (ccn->irq) { arm_ccn_pmu_init()
1281 err = irq_set_affinity(ccn->irq, &ccn->dt.cpu); arm_ccn_pmu_init()
1283 dev_err(ccn->dev, "Failed to set interrupt affinity!\n"); arm_ccn_pmu_init()
1288 err = perf_pmu_register(&ccn->dt.pmu, name, -1); arm_ccn_pmu_init()
1296 unregister_cpu_notifier(&ccn->dt.cpu_nb); arm_ccn_pmu_init()
1298 ida_simple_remove(&arm_ccn_pmu_ida, ccn->dt.id); arm_ccn_pmu_init()
1299 for (i = 0; i < ccn->num_xps; i++) arm_ccn_pmu_init()
1300 writel(0, ccn->xp[i].base + CCN_XP_DT_CONTROL); arm_ccn_pmu_init()
1301 writel(0, ccn->dt.base + CCN_DT_PMCR); arm_ccn_pmu_init()
1305 static void arm_ccn_pmu_cleanup(struct arm_ccn *ccn) arm_ccn_pmu_cleanup() argument
1309 irq_set_affinity(ccn->irq, cpu_possible_mask); arm_ccn_pmu_cleanup()
1310 unregister_cpu_notifier(&ccn->dt.cpu_nb); arm_ccn_pmu_cleanup()
1311 for (i = 0; i < ccn->num_xps; i++) arm_ccn_pmu_cleanup()
1312 writel(0, ccn->xp[i].base + CCN_XP_DT_CONTROL); arm_ccn_pmu_cleanup()
1313 writel(0, ccn->dt.base + CCN_DT_PMCR); arm_ccn_pmu_cleanup()
1314 perf_pmu_unregister(&ccn->dt.pmu); arm_ccn_pmu_cleanup()
1315 ida_simple_remove(&arm_ccn_pmu_ida, ccn->dt.id); arm_ccn_pmu_cleanup()
1319 static int arm_ccn_for_each_valid_region(struct arm_ccn *ccn, arm_ccn_for_each_valid_region() argument
1320 int (*callback)(struct arm_ccn *ccn, int region, arm_ccn_for_each_valid_region()
1330 val = readl(ccn->base + CCN_MN_OLY_COMP_LIST_63_0 + arm_ccn_for_each_valid_region()
1335 base = ccn->base + region * CCN_REGION_SIZE; arm_ccn_for_each_valid_region()
1342 err = callback(ccn, region, base, type, id); arm_ccn_for_each_valid_region()
1350 static int arm_ccn_get_nodes_num(struct arm_ccn *ccn, int region, arm_ccn_get_nodes_num() argument
1354 if (type == CCN_TYPE_XP && id >= ccn->num_xps) arm_ccn_get_nodes_num()
1355 ccn->num_xps = id + 1; arm_ccn_get_nodes_num()
1356 else if (id >= ccn->num_nodes) arm_ccn_get_nodes_num()
1357 ccn->num_nodes = id + 1; arm_ccn_get_nodes_num()
1362 static int arm_ccn_init_nodes(struct arm_ccn *ccn, int region, arm_ccn_init_nodes() argument
1367 dev_dbg(ccn->dev, "Region %d: id=%u, type=0x%02x\n", region, id, type); arm_ccn_init_nodes()
1374 component = &ccn->xp[id]; arm_ccn_init_nodes()
1377 ccn->sbsx_present = 1; arm_ccn_init_nodes()
1378 component = &ccn->node[id]; arm_ccn_init_nodes()
1381 ccn->sbas_present = 1; arm_ccn_init_nodes()
1384 component = &ccn->node[id]; arm_ccn_init_nodes()
1395 static irqreturn_t arm_ccn_error_handler(struct arm_ccn *ccn, arm_ccn_error_handler() argument
1399 dev_err(ccn->dev, "Error reported in %08x%08x%08x%08x%08x%08x.\n", arm_ccn_error_handler()
1402 dev_err(ccn->dev, "Disabling interrupt generation for all errors.\n"); arm_ccn_error_handler()
1404 ccn->base + CCN_MN_ERRINT_STATUS); arm_ccn_error_handler()
1413 struct arm_ccn *ccn = dev_id; arm_ccn_irq_handler() local
1419 err_or = err_sig_val[0] = readl(ccn->base + CCN_MN_ERR_SIG_VAL_63_0); arm_ccn_irq_handler()
1422 res = arm_ccn_pmu_overflow_handler(&ccn->dt); arm_ccn_irq_handler()
1427 err_sig_val[i] = readl(ccn->base + arm_ccn_irq_handler()
1432 res |= arm_ccn_error_handler(ccn, err_sig_val); arm_ccn_irq_handler()
1436 ccn->base + CCN_MN_ERRINT_STATUS); arm_ccn_irq_handler()
1444 struct arm_ccn *ccn; arm_ccn_probe() local
1449 ccn = devm_kzalloc(&pdev->dev, sizeof(*ccn), GFP_KERNEL); arm_ccn_probe()
1450 if (!ccn) arm_ccn_probe()
1452 ccn->dev = &pdev->dev; arm_ccn_probe()
1453 platform_set_drvdata(pdev, ccn); arm_ccn_probe()
1459 if (!devm_request_mem_region(ccn->dev, res->start, arm_ccn_probe()
1463 ccn->base = devm_ioremap(ccn->dev, res->start, arm_ccn_probe()
1465 if (!ccn->base) arm_ccn_probe()
1475 ccn->base + CCN_MN_ERRINT_STATUS); arm_ccn_probe()
1476 if (readl(ccn->base + CCN_MN_ERRINT_STATUS) & arm_ccn_probe()
1480 ccn->base + CCN_MN_ERRINT_STATUS); arm_ccn_probe()
1481 err = devm_request_irq(ccn->dev, irq, arm_ccn_irq_handler, 0, arm_ccn_probe()
1482 dev_name(ccn->dev), ccn); arm_ccn_probe()
1486 ccn->irq = irq; arm_ccn_probe()
1492 err = arm_ccn_for_each_valid_region(ccn, arm_ccn_get_nodes_num); arm_ccn_probe()
1496 ccn->node = devm_kzalloc(ccn->dev, sizeof(*ccn->node) * ccn->num_nodes, arm_ccn_probe()
1498 ccn->xp = devm_kzalloc(ccn->dev, sizeof(*ccn->node) * ccn->num_xps, arm_ccn_probe()
1500 if (!ccn->node || !ccn->xp) arm_ccn_probe()
1503 err = arm_ccn_for_each_valid_region(ccn, arm_ccn_init_nodes); arm_ccn_probe()
1507 return arm_ccn_pmu_init(ccn); arm_ccn_probe()
1512 struct arm_ccn *ccn = platform_get_drvdata(pdev); arm_ccn_remove() local
1514 arm_ccn_pmu_cleanup(ccn); arm_ccn_remove()
1520 { .compatible = "arm,ccn-504", },
1526 .name = "arm-ccn",
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