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Searched refs:c12 (Results 1 – 10 of 10) sorted by relevance

/linux-4.4.14/arch/arm/include/asm/
Darch_gicv3.h29 #define ICC_EOIR1 __ACCESS_CP15(c12, 0, c12, 1)
30 #define ICC_DIR __ACCESS_CP15(c12, 0, c11, 1)
31 #define ICC_IAR1 __ACCESS_CP15(c12, 0, c12, 0)
32 #define ICC_SGI1R __ACCESS_CP15_64(0, c12)
34 #define ICC_CTLR __ACCESS_CP15(c12, 0, c12, 4)
35 #define ICC_SRE __ACCESS_CP15(c12, 0, c12, 5)
36 #define ICC_IGRPEN1 __ACCESS_CP15(c12, 0, c12, 7)
38 #define ICC_HSRE __ACCESS_CP15(c12, 4, c9, 5)
40 #define ICH_VSEIR __ACCESS_CP15(c12, 4, c9, 4)
41 #define ICH_HCR __ACCESS_CP15(c12, 4, c11, 0)
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/linux-4.4.14/arch/arm/include/asm/hardware/
Dcp14.h77 #define RCP14_DBGBVR12() MRC14(0, c0, c12, 4)
93 #define RCP14_DBGBCR12() MRC14(0, c0, c12, 5)
109 #define RCP14_DBGWVR12() MRC14(0, c0, c12, 6)
125 #define RCP14_DBGWCR12() MRC14(0, c0, c12, 7)
142 #define RCP14_DBGBXVR12() MRC14(0, c1, c12, 1)
182 #define WCP14_DBGBVR12(val) MCR14(val, 0, c0, c12, 4)
198 #define WCP14_DBGBCR12(val) MCR14(val, 0, c0, c12, 5)
214 #define WCP14_DBGWVR12(val) MCR14(val, 0, c0, c12, 6)
230 #define WCP14_DBGWCR12(val) MCR14(val, 0, c0, c12, 7)
246 #define WCP14_DBGBXVR12(val) MCR14(val, 0, c1, c12, 1)
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/linux-4.4.14/drivers/iio/pressure/
Dmpl115.c34 s16 c12; member
71 a1 = data->b1 + ((data->c12 * tadc) >> 11); in mpl115_comp_pressure()
189 data->c12 = ret; in mpl115_probe()
/linux-4.4.14/arch/arm/kernel/
Dhyp-stub.S128 mcr p15, 4, r7, c12, c0, 0 @ set hypervisor vector base (HVBAR)
/linux-4.4.14/arch/arm/kvm/
Dinit.S136 mcr p15, 4, r1, c12, c0, 0 @ HVBAR
Dinterrupts.S385 mrceq p15, 4, r0, c12, c0, 0 @ get HVBAR
Dinterrupts_head.S287 mrc p15, 0, r12, c12, c0, 0 @ VBAR
370 mcr p15, 0, r12, c12, c0, 0 @ VBAR
/linux-4.4.14/arch/arm/mach-omap2/
Dsram242x.S249 mcrr p15, 1, r8, r4, c12 @ preload into icache
Dsram243x.S249 mcrr p15, 1, r8, r4, c12 @ preload into icache
/linux-4.4.14/Documentation/input/
Dxpad.txt205 P: Vendor=0c12 ProdID=8809 Rev= 0.01