Searched refs:base_clk (Results 1 – 6 of 6) sorted by relevance
50 struct clk **clks, *base_clk, *prediv_clk; in sun4i_pll2_setup() local103 base_clk = clk_register_composite(NULL, "pll2-base", in sun4i_pll2_setup()109 if (!base_clk) { in sun4i_pll2_setup()114 parent = __clk_get_name(base_clk); in sun4i_pll2_setup()
88 struct clk *base_clk; member158 rate = clk_get_rate(chip->base_clk); in pwm_samsung_get_tin_rate()534 chip->base_clk = devm_clk_get(&pdev->dev, "timers"); in pwm_samsung_probe()535 if (IS_ERR(chip->base_clk)) { in pwm_samsung_probe()537 return PTR_ERR(chip->base_clk); in pwm_samsung_probe()540 ret = clk_prepare_enable(chip->base_clk); in pwm_samsung_probe()559 clk_disable_unprepare(chip->base_clk); in pwm_samsung_probe()564 clk_get_rate(chip->base_clk), in pwm_samsung_probe()580 clk_disable_unprepare(chip->base_clk); in pwm_samsung_remove()
38 base_clk: base_clk { label46 clocks = <&base_clk>;
46 &base_clk {
38 &base_clk {
23 clocks = <&base_clk>;