Searched refs:allowed_sclk_vddc_table (Results 1 - 2 of 2) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/radeon/
H A Dci_dpm.c3414 struct radeon_clock_voltage_dependency_table *allowed_sclk_vddc_table = ci_setup_default_dpm_tables() local
3422 if (allowed_sclk_vddc_table == NULL) ci_setup_default_dpm_tables()
3424 if (allowed_sclk_vddc_table->count < 1) ci_setup_default_dpm_tables()
3450 for (i = 0; i < allowed_sclk_vddc_table->count; i++) { ci_setup_default_dpm_tables()
3453 allowed_sclk_vddc_table->entries[i].clk)) { ci_setup_default_dpm_tables()
3455 allowed_sclk_vddc_table->entries[i].clk; ci_setup_default_dpm_tables()
3475 for (i = 0; i < allowed_sclk_vddc_table->count; i++) { ci_setup_default_dpm_tables()
3477 allowed_sclk_vddc_table->entries[i].v; ci_setup_default_dpm_tables()
3482 pi->dpm_table.vddc_table.count = allowed_sclk_vddc_table->count; ci_setup_default_dpm_tables()
4885 struct radeon_clock_voltage_dependency_table *allowed_sclk_vddc_table = ci_set_private_data_variables_based_on_pptable() local
4892 if (allowed_sclk_vddc_table == NULL) ci_set_private_data_variables_based_on_pptable()
4894 if (allowed_sclk_vddc_table->count < 1) ci_set_private_data_variables_based_on_pptable()
4905 pi->min_vddc_in_pp_table = allowed_sclk_vddc_table->entries[0].v; ci_set_private_data_variables_based_on_pptable()
4907 allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].v; ci_set_private_data_variables_based_on_pptable()
4914 allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].clk; ci_set_private_data_variables_based_on_pptable()
4916 allowed_mclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].clk; ci_set_private_data_variables_based_on_pptable()
4918 allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].v; ci_set_private_data_variables_based_on_pptable()
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
H A Dci_dpm.c3550 struct amdgpu_clock_voltage_dependency_table *allowed_sclk_vddc_table = ci_setup_default_dpm_tables() local
3558 if (allowed_sclk_vddc_table == NULL) ci_setup_default_dpm_tables()
3560 if (allowed_sclk_vddc_table->count < 1) ci_setup_default_dpm_tables()
3586 for (i = 0; i < allowed_sclk_vddc_table->count; i++) { ci_setup_default_dpm_tables()
3589 allowed_sclk_vddc_table->entries[i].clk)) { ci_setup_default_dpm_tables()
3591 allowed_sclk_vddc_table->entries[i].clk; ci_setup_default_dpm_tables()
3611 for (i = 0; i < allowed_sclk_vddc_table->count; i++) { ci_setup_default_dpm_tables()
3613 allowed_sclk_vddc_table->entries[i].v; ci_setup_default_dpm_tables()
3618 pi->dpm_table.vddc_table.count = allowed_sclk_vddc_table->count; ci_setup_default_dpm_tables()
5053 struct amdgpu_clock_voltage_dependency_table *allowed_sclk_vddc_table = ci_set_private_data_variables_based_on_pptable() local
5060 if (allowed_sclk_vddc_table == NULL) ci_set_private_data_variables_based_on_pptable()
5062 if (allowed_sclk_vddc_table->count < 1) ci_set_private_data_variables_based_on_pptable()
5073 pi->min_vddc_in_pp_table = allowed_sclk_vddc_table->entries[0].v; ci_set_private_data_variables_based_on_pptable()
5075 allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].v; ci_set_private_data_variables_based_on_pptable()
5082 allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].clk; ci_set_private_data_variables_based_on_pptable()
5084 allowed_mclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].clk; ci_set_private_data_variables_based_on_pptable()
5086 allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].v; ci_set_private_data_variables_based_on_pptable()

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