Searched refs:_CHV_CMN_DW5_CH0 (Results 1 – 3 of 3) sorted by relevance
| /linux-4.4.14/drivers/gpu/drm/i915/ |
| D | intel_hdmi.c | 1715 val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW5_CH0); in chv_hdmi_pre_pll_enable()
1721 vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW5_CH0, val); in chv_hdmi_pre_pll_enable()
1774 val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW5_CH0); in chv_hdmi_post_pll_disable()
1776 vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW5_CH0, val); in chv_hdmi_post_pll_disable()
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| D | intel_dp.c | 2927 val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW5_CH0); in chv_dp_pre_pll_enable()
2933 vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW5_CH0, val); in chv_dp_pre_pll_enable()
2988 val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW5_CH0); in chv_dp_post_pll_disable()
2990 vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW5_CH0, val); in chv_dp_post_pll_disable()
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| D | i915_reg.h | 1113 #define _CHV_CMN_DW5_CH0 0x8114 macro
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