Searched refs:SOCFPGA_PLL_DIVF_MASK (Results 1 - 2 of 2) sorted by relevance

/linux-4.4.14/drivers/clk/socfpga/
H A Dclk-pll-a10.c32 #define SOCFPGA_PLL_DIVF_MASK 0x00001FFF macro
54 divf = (reg & SOCFPGA_PLL_DIVF_MASK) >> SOCFPGA_PLL_DIVF_SHIFT; clk_pll_recalc_rate()
H A Dclk-pll.c36 #define SOCFPGA_PLL_DIVF_MASK 0x0000FFF8 macro
61 divf = (reg & SOCFPGA_PLL_DIVF_MASK) >> SOCFPGA_PLL_DIVF_SHIFT; clk_pll_recalc_rate()

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