Searched refs:PXA1928_CLK_UART1 (Results 1 - 8 of 8) sorted by relevance

/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dmarvell,pxa1928.h20 #define PXA1928_CLK_UART1 0x0c macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
H A Dmarvell,pxa1928.h20 #define PXA1928_CLK_UART1 0x0c macro
/linux-4.4.14/include/dt-bindings/clock/
H A Dmarvell,pxa1928.h20 #define PXA1928_CLK_UART1 0x0c macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dmarvell,pxa1928.h20 #define PXA1928_CLK_UART1 0x0c macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dmarvell,pxa1928.h20 #define PXA1928_CLK_UART1 0x0c macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dmarvell,pxa1928.h20 #define PXA1928_CLK_UART1 0x0c macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dmarvell,pxa1928.h20 #define PXA1928_CLK_UART1 0x0c macro
/linux-4.4.14/drivers/clk/mmp/
H A Dclk-of-pxa1928.c101 {0, "uart1_mux", uart_parent_names, ARRAY_SIZE(uart_parent_names), CLK_SET_RATE_PARENT, PXA1928_CLK_UART1 * 4, 4, 3, 0, &uart1_lock},
124 {PXA1928_CLK_UART1, "uart1_clk", "uart1_mux", CLK_SET_RATE_PARENT, PXA1928_CLK_UART1 * 4, 0x3, 0x3, 0x0, 0, &uart1_lock},

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