Searched refs:PJ4 (Results 1 - 15 of 15) sorted by relevance

/linux-4.4.14/arch/blackfin/include/mach-common/
H A Dports-j.h12 #define PJ4 (1 << 4) macro
/linux-4.4.14/arch/arm/kernel/
H A Diwmmxt.S24 #define PJ4(code...) code define
29 #define PJ4(code...) define
77 PJ4(mrc p15, 0, r2, c1, c0, 2)
80 PJ4(tst r2, #0xf)
85 PJ4(orr r2, r2, #0xf)
86 PJ4(mcr p15, 0, r2, c1, c0, 2)
216 PJ4(mrc p15, 0, r4, c1, c0, 2)
217 PJ4(orr r4, r4, #0xf)
218 PJ4(mcr p15, 0, r4, c1, c0, 2)
229 PJ4(bic r4, r4, #0xf)
230 PJ4(mcr p15, 0, r4, c1, c0, 2)
326 PJ4(mrc p15, 0, r1, c1, c0, 2)
329 PJ4(tst r1, #0xf)
341 PJ4(eor r1, r1, #0xf)
342 PJ4(mcr p15, 0, r1, c1, c0, 2)
H A Dpj4-cp0.c4 * PJ4 iWMMXt coprocessor context switching and handling
120 pr_info("PJ4 iWMMXt coprocessor detected, but kernel support is missing.\n"); pj4_cp0_init()
125 pr_info("PJ4 iWMMXt v%d coprocessor enabled.\n", vers); pj4_cp0_init()
/linux-4.4.14/arch/arm/mach-mmp/include/mach/
H A Dregs-icu.h37 * IRQ1 is routed to PJ4 IRQ, and IRQ2 is routes to PJ4 FIQ.
/linux-4.4.14/arch/arm/mm/
H A Dcache-tauros2.c13 * - PJ4 CPU Core Datasheet,
235 * cache ops. (PJ4 is in its v7 personality mode if the MMFR3 tauros2_internal_init()
/linux-4.4.14/arch/arm/mach-mmp/
H A Dpm-mmp2.c236 * direct PJ4 to DDR access through Memory Controller slow queue mmp2_pm_init()
/linux-4.4.14/arch/arm/include/asm/
H A Dcputype.h238 * Marvell's PJ4 and PJ4B cores are based on V7 version,
/linux-4.4.14/drivers/pinctrl/
H A Dpinctrl-adi2-bf54x.c156 PINCTRL_PIN(148, "PJ4"),
H A Dpinctrl-tegra210.c262 PINCTRL_PIN(TEGRA_PIN_DAP4_FS_PJ4, "DAP4_FS PJ4"),
H A Dpinctrl-tegra20.c435 PINCTRL_PIN(TEGRA_PIN_LCD_VSYNC_PJ4, "LCD_VSYNC PJ4"),
H A Dpinctrl-tegra30.c374 PINCTRL_PIN(TEGRA_PIN_LCD_VSYNC_PJ4, "LCD_VSYNC PJ4"),
/linux-4.4.14/drivers/pinctrl/sh-pfc/
H A Dpfc-sh7786.c484 PINMUX_GPIO(PJ4),
H A Dpfc-sh7785.c757 PINMUX_GPIO(PJ4),
H A Dpfc-sh7264.c1198 PINMUX_GPIO(PJ4),
H A Dpfc-sh7269.c1610 PINMUX_GPIO(PJ4),

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