Searched refs:MPLL_SS1 (Results 1 - 10 of 10) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/radeon/
H A Drv740d.h110 #define MPLL_SS1 0x85c macro
H A Drv740_dpm.c311 pi->clk_regs.rv770.mpll_ss1 = RREG32(MPLL_SS1); rv740_read_clock_registers()
H A Dnid.h687 #define MPLL_SS1 0x85c macro
H A Dsid.h630 #define MPLL_SS1 0x2bcc macro
H A Dcikd.h755 #define MPLL_SS1 0x2bcc macro
H A Devergreend.h225 #define MPLL_SS1 0x85c macro
H A Dci_dpm.c1863 pi->clock_registers.mpll_ss1 = RREG32(MPLL_SS1); ci_read_clock_registers()
H A Dni_dpm.c1195 ni_pi->clock_registers.mpll_ss1 = RREG32(MPLL_SS1); ni_read_clock_registers()
H A Dsi_dpm.c3597 si_pi->clock_registers.mpll_ss1 = RREG32(MPLL_SS1); si_read_clock_registers()
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
H A Dci_dpm.c6421 dev_info(adev->dev, " MPLL_SS1=0x%08X\n", ci_dpm_print_status()

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