Searched refs:MDMA_S1_CONFIG (Results 1 - 14 of 14) sorted by relevance

/linux-4.4.14/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h384 #define bfin_read_MDMA_S1_CONFIG() bfin_read16(MDMA_S1_CONFIG)
385 #define bfin_write_MDMA_S1_CONFIG(val) bfin_write16(MDMA_S1_CONFIG,val)
H A DdefBF532.h312 #define MDMA_S1_CONFIG 0xFFC00EC8 /* MemDMA Stream 1 Source Configuration Register */ macro
/linux-4.4.14/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF512.h782 #define bfin_read_MDMA_S1_CONFIG() bfin_read16(MDMA_S1_CONFIG)
783 #define bfin_write_MDMA_S1_CONFIG(val) bfin_write16(MDMA_S1_CONFIG, val)
H A DdefBF512.h433 #define MDMA_S1_CONFIG 0xFFC00FC8 /* MemDMA Stream 1 Source Configuration Register */ macro
/linux-4.4.14/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF522.h799 #define bfin_read_MDMA_S1_CONFIG() bfin_read16(MDMA_S1_CONFIG)
800 #define bfin_write_MDMA_S1_CONFIG(val) bfin_write16(MDMA_S1_CONFIG, val)
H A DdefBF522.h433 #define MDMA_S1_CONFIG 0xFFC00FC8 /* MemDMA Stream 1 Source Configuration Register */ macro
/linux-4.4.14/arch/blackfin/mach-bf561/include/mach/
H A DcdefBF561.h1336 #define bfin_read_MDMA_S1_CONFIG() bfin_read16(MDMA_S1_CONFIG)
1337 #define bfin_write_MDMA_S1_CONFIG(val) bfin_write16(MDMA_S1_CONFIG,val)
H A DdefBF561.h524 #define MDMA_S1_CONFIG 0xFFC01FC8 /*MemDMA1 Stream 1 Source Configuration */ macro
/linux-4.4.14/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h1092 #define bfin_read_MDMA_S1_CONFIG() bfin_read16(MDMA_S1_CONFIG)
1093 #define bfin_write_MDMA_S1_CONFIG(val) bfin_write16(MDMA_S1_CONFIG, val)
H A DdefBF538.h354 #define MDMA_S1_CONFIG 0xFFC00EC8 /* MemDMA0 Stream 1 Source Configuration Register */ macro
/linux-4.4.14/arch/blackfin/mach-bf537/include/mach/
H A DcdefBF534.h761 #define bfin_read_MDMA_S1_CONFIG() bfin_read16(MDMA_S1_CONFIG)
762 #define bfin_write_MDMA_S1_CONFIG(val) bfin_write16(MDMA_S1_CONFIG,val)
H A DdefBF534.h409 #define MDMA_S1_CONFIG 0xFFC00FC8 /* MemDMA Stream 1 Source Configuration Register */ macro
/linux-4.4.14/arch/blackfin/mach-bf548/include/mach/
H A DcdefBF54x_base.h742 #define bfin_read_MDMA_S1_CONFIG() bfin_read16(MDMA_S1_CONFIG)
743 #define bfin_write_MDMA_S1_CONFIG(val) bfin_write16(MDMA_S1_CONFIG, val)
H A DdefBF54x_base.h443 #define MDMA_S1_CONFIG 0xffc00fc8 /* Memory DMA Stream 1 Source Configuration Register */ macro

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