Searched refs:MAL (Results 1 - 12 of 12) sorted by relevance

/linux-4.4.14/drivers/net/ethernet/ibm/emac/
H A Dmal.h4 * Memory Access Layer (MAL) support
28 * There are some variations on the MAL, we express them in this driver as
29 * MAL Version 1 and 2 though that doesn't match any IBM terminology.
31 * We call MAL 1 the version in 405GP, 405GPR, 405EP, 440EP, 440GR and
34 * We call MAL 2 the version in 440GP, 440GX, 440SP, 440SPE and Axon
50 /* MAL V1 CFG bits */
59 /* MAL V2 CFG bits */
84 /* MAL V1 ESR bits */
88 /* MAL V2 ESR bits */
98 /* MAL IER bits */
125 /* In reality MAL can handle TX buffers up to 4095 bytes long,
144 /* MAL Buffer Descriptor structure */
146 u16 ctrl; /* MAL / Commac status control bits */
197 int serr_irq; /* MAL System Error IRQ */
228 /* Features of various MAL implementations */
235 /* Set if your MAL has SERR, TXDE, and RXDE OR'd into a single UIC
260 /* Register MAL devices */
284 /* Add/remove EMAC to/from MAL polling list */
288 /* Ethtool MAL registers */
H A Dmal.c4 * Memory Access Layer (MAL) support
380 /* Synchronize with the MAL NAPI poller */ mal_poll_disable()
544 "mal%d: can't find MAL num-tx-chans property!\n", mal_probe()
554 "mal%d: can't find MAL num-rx-chans property!\n", mal_probe()
621 /* Set the MAL configuration register */ mal_probe()
668 err = request_irq(mal->serr_irq, hdlr_serr, irqflags, "MAL SERR", mal); mal_probe()
671 err = request_irq(mal->txde_irq, hdlr_txde, irqflags, "MAL TX DE", mal); mal_probe()
674 err = request_irq(mal->txeob_irq, mal_txeob, 0, "MAL TX EOB", mal); mal_probe()
677 err = request_irq(mal->rxde_irq, hdlr_rxde, irqflags, "MAL RX DE", mal); mal_probe()
680 err = request_irq(mal->rxeob_irq, mal_rxeob, 0, "MAL RX EOB", mal); mal_probe()
684 /* Enable all MAL SERR interrupt sources */ mal_probe()
691 "MAL v%d %s, %d TX channels, %d RX channels\n", mal_probe()
H A Dcore.h175 /* MAL linkage */
239 u32 mal_burst_size; /* move to MAL ? */
441 * We want to get not just EMAC registers, but also MAL, ZMII, RGMII, TAH
445 * MAL registers, EMAC registers and optional ZMII, RGMII, TAH registers.
H A Ddebug.c128 printk("** MAL %s Registers **\n" emac_mal_dump()
H A Dcore.c2788 /* Register with MAL */ emac_probe()
/linux-4.4.14/drivers/i2c/busses/
H A Di2c-rcar.c77 #define MAL (1 << 5) /* arbitration lost */ macro
89 #define RCAR_IRQ_SEND (MNR | MAL | MST | MAT | MDE)
90 #define RCAR_IRQ_RECV (MNR | MAL | MST | MAT | MDR)
448 if (msr & MAL) { rcar_i2c_irq()
H A Di2c-mpc.c168 dev_dbg(i2c->dev, "MAL\n"); i2c_wait()
/linux-4.4.14/arch/powerpc/include/asm/
H A Ddcr-regs.h18 * Most DCRs used for controlling devices such as the MAL, DMA engine,
/linux-4.4.14/arch/powerpc/boot/
H A D4xx.c292 /* Quiesce the MAL and EMAC(s) since PIBS/OpenBIOS don't ibm4xx_quiesce_eth()
/linux-4.4.14/drivers/media/radio/
H A Dradio-wl1273.c282 dev_dbg(radio->dev, "IRQ: MAL\n"); wl1273_fm_irq_thread_handler()
/linux-4.4.14/drivers/media/radio/wl128x/
H A Dfmdrv_common.c608 fmerr("irq: HW MAL int received - do nothing\n"); fm_irq_handle_hw_malfunction()
/linux-4.4.14/drivers/edac/
H A Dppc4xx_edac.c231 [SDRAM_PLB_M0ID_MAL] = "MAL",

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