Searched refs:Init_Ctrl (Results 1 - 1 of 1) sorted by relevance

/linux-4.4.14/drivers/media/tuners/
H A Dmxl5005s.c273 Init_Ctrl[INITCTRL_NUM]; /* INIT Control Names Array Pointer */ member in struct:mxl5005s_state
727 state->Init_Ctrl[0].Ctrl_Num = DN_IQTN_AMP_CUT ; MXL5005_ControlInit()
728 state->Init_Ctrl[0].size = 1 ; MXL5005_ControlInit()
729 state->Init_Ctrl[0].addr[0] = 73; MXL5005_ControlInit()
730 state->Init_Ctrl[0].bit[0] = 7; MXL5005_ControlInit()
731 state->Init_Ctrl[0].val[0] = 0; MXL5005_ControlInit()
733 state->Init_Ctrl[1].Ctrl_Num = BB_MODE ; MXL5005_ControlInit()
734 state->Init_Ctrl[1].size = 1 ; MXL5005_ControlInit()
735 state->Init_Ctrl[1].addr[0] = 53; MXL5005_ControlInit()
736 state->Init_Ctrl[1].bit[0] = 2; MXL5005_ControlInit()
737 state->Init_Ctrl[1].val[0] = 1; MXL5005_ControlInit()
739 state->Init_Ctrl[2].Ctrl_Num = BB_BUF ; MXL5005_ControlInit()
740 state->Init_Ctrl[2].size = 2 ; MXL5005_ControlInit()
741 state->Init_Ctrl[2].addr[0] = 53; MXL5005_ControlInit()
742 state->Init_Ctrl[2].bit[0] = 1; MXL5005_ControlInit()
743 state->Init_Ctrl[2].val[0] = 0; MXL5005_ControlInit()
744 state->Init_Ctrl[2].addr[1] = 57; MXL5005_ControlInit()
745 state->Init_Ctrl[2].bit[1] = 0; MXL5005_ControlInit()
746 state->Init_Ctrl[2].val[1] = 1; MXL5005_ControlInit()
748 state->Init_Ctrl[3].Ctrl_Num = BB_BUF_OA ; MXL5005_ControlInit()
749 state->Init_Ctrl[3].size = 1 ; MXL5005_ControlInit()
750 state->Init_Ctrl[3].addr[0] = 53; MXL5005_ControlInit()
751 state->Init_Ctrl[3].bit[0] = 0; MXL5005_ControlInit()
752 state->Init_Ctrl[3].val[0] = 0; MXL5005_ControlInit()
754 state->Init_Ctrl[4].Ctrl_Num = BB_ALPF_BANDSELECT ; MXL5005_ControlInit()
755 state->Init_Ctrl[4].size = 3 ; MXL5005_ControlInit()
756 state->Init_Ctrl[4].addr[0] = 53; MXL5005_ControlInit()
757 state->Init_Ctrl[4].bit[0] = 5; MXL5005_ControlInit()
758 state->Init_Ctrl[4].val[0] = 0; MXL5005_ControlInit()
759 state->Init_Ctrl[4].addr[1] = 53; MXL5005_ControlInit()
760 state->Init_Ctrl[4].bit[1] = 6; MXL5005_ControlInit()
761 state->Init_Ctrl[4].val[1] = 0; MXL5005_ControlInit()
762 state->Init_Ctrl[4].addr[2] = 53; MXL5005_ControlInit()
763 state->Init_Ctrl[4].bit[2] = 7; MXL5005_ControlInit()
764 state->Init_Ctrl[4].val[2] = 1; MXL5005_ControlInit()
766 state->Init_Ctrl[5].Ctrl_Num = BB_IQSWAP ; MXL5005_ControlInit()
767 state->Init_Ctrl[5].size = 1 ; MXL5005_ControlInit()
768 state->Init_Ctrl[5].addr[0] = 59; MXL5005_ControlInit()
769 state->Init_Ctrl[5].bit[0] = 0; MXL5005_ControlInit()
770 state->Init_Ctrl[5].val[0] = 0; MXL5005_ControlInit()
772 state->Init_Ctrl[6].Ctrl_Num = BB_DLPF_BANDSEL ; MXL5005_ControlInit()
773 state->Init_Ctrl[6].size = 2 ; MXL5005_ControlInit()
774 state->Init_Ctrl[6].addr[0] = 53; MXL5005_ControlInit()
775 state->Init_Ctrl[6].bit[0] = 3; MXL5005_ControlInit()
776 state->Init_Ctrl[6].val[0] = 0; MXL5005_ControlInit()
777 state->Init_Ctrl[6].addr[1] = 53; MXL5005_ControlInit()
778 state->Init_Ctrl[6].bit[1] = 4; MXL5005_ControlInit()
779 state->Init_Ctrl[6].val[1] = 1; MXL5005_ControlInit()
781 state->Init_Ctrl[7].Ctrl_Num = RFSYN_CHP_GAIN ; MXL5005_ControlInit()
782 state->Init_Ctrl[7].size = 4 ; MXL5005_ControlInit()
783 state->Init_Ctrl[7].addr[0] = 22; MXL5005_ControlInit()
784 state->Init_Ctrl[7].bit[0] = 4; MXL5005_ControlInit()
785 state->Init_Ctrl[7].val[0] = 0; MXL5005_ControlInit()
786 state->Init_Ctrl[7].addr[1] = 22; MXL5005_ControlInit()
787 state->Init_Ctrl[7].bit[1] = 5; MXL5005_ControlInit()
788 state->Init_Ctrl[7].val[1] = 1; MXL5005_ControlInit()
789 state->Init_Ctrl[7].addr[2] = 22; MXL5005_ControlInit()
790 state->Init_Ctrl[7].bit[2] = 6; MXL5005_ControlInit()
791 state->Init_Ctrl[7].val[2] = 1; MXL5005_ControlInit()
792 state->Init_Ctrl[7].addr[3] = 22; MXL5005_ControlInit()
793 state->Init_Ctrl[7].bit[3] = 7; MXL5005_ControlInit()
794 state->Init_Ctrl[7].val[3] = 0; MXL5005_ControlInit()
796 state->Init_Ctrl[8].Ctrl_Num = RFSYN_EN_CHP_HIGAIN ; MXL5005_ControlInit()
797 state->Init_Ctrl[8].size = 1 ; MXL5005_ControlInit()
798 state->Init_Ctrl[8].addr[0] = 22; MXL5005_ControlInit()
799 state->Init_Ctrl[8].bit[0] = 2; MXL5005_ControlInit()
800 state->Init_Ctrl[8].val[0] = 0; MXL5005_ControlInit()
802 state->Init_Ctrl[9].Ctrl_Num = AGC_IF ; MXL5005_ControlInit()
803 state->Init_Ctrl[9].size = 4 ; MXL5005_ControlInit()
804 state->Init_Ctrl[9].addr[0] = 76; MXL5005_ControlInit()
805 state->Init_Ctrl[9].bit[0] = 0; MXL5005_ControlInit()
806 state->Init_Ctrl[9].val[0] = 1; MXL5005_ControlInit()
807 state->Init_Ctrl[9].addr[1] = 76; MXL5005_ControlInit()
808 state->Init_Ctrl[9].bit[1] = 1; MXL5005_ControlInit()
809 state->Init_Ctrl[9].val[1] = 1; MXL5005_ControlInit()
810 state->Init_Ctrl[9].addr[2] = 76; MXL5005_ControlInit()
811 state->Init_Ctrl[9].bit[2] = 2; MXL5005_ControlInit()
812 state->Init_Ctrl[9].val[2] = 0; MXL5005_ControlInit()
813 state->Init_Ctrl[9].addr[3] = 76; MXL5005_ControlInit()
814 state->Init_Ctrl[9].bit[3] = 3; MXL5005_ControlInit()
815 state->Init_Ctrl[9].val[3] = 1; MXL5005_ControlInit()
817 state->Init_Ctrl[10].Ctrl_Num = AGC_RF ; MXL5005_ControlInit()
818 state->Init_Ctrl[10].size = 4 ; MXL5005_ControlInit()
819 state->Init_Ctrl[10].addr[0] = 76; MXL5005_ControlInit()
820 state->Init_Ctrl[10].bit[0] = 4; MXL5005_ControlInit()
821 state->Init_Ctrl[10].val[0] = 1; MXL5005_ControlInit()
822 state->Init_Ctrl[10].addr[1] = 76; MXL5005_ControlInit()
823 state->Init_Ctrl[10].bit[1] = 5; MXL5005_ControlInit()
824 state->Init_Ctrl[10].val[1] = 1; MXL5005_ControlInit()
825 state->Init_Ctrl[10].addr[2] = 76; MXL5005_ControlInit()
826 state->Init_Ctrl[10].bit[2] = 6; MXL5005_ControlInit()
827 state->Init_Ctrl[10].val[2] = 0; MXL5005_ControlInit()
828 state->Init_Ctrl[10].addr[3] = 76; MXL5005_ControlInit()
829 state->Init_Ctrl[10].bit[3] = 7; MXL5005_ControlInit()
830 state->Init_Ctrl[10].val[3] = 1; MXL5005_ControlInit()
832 state->Init_Ctrl[11].Ctrl_Num = IF_DIVVAL ; MXL5005_ControlInit()
833 state->Init_Ctrl[11].size = 5 ; MXL5005_ControlInit()
834 state->Init_Ctrl[11].addr[0] = 43; MXL5005_ControlInit()
835 state->Init_Ctrl[11].bit[0] = 3; MXL5005_ControlInit()
836 state->Init_Ctrl[11].val[0] = 0; MXL5005_ControlInit()
837 state->Init_Ctrl[11].addr[1] = 43; MXL5005_ControlInit()
838 state->Init_Ctrl[11].bit[1] = 4; MXL5005_ControlInit()
839 state->Init_Ctrl[11].val[1] = 0; MXL5005_ControlInit()
840 state->Init_Ctrl[11].addr[2] = 43; MXL5005_ControlInit()
841 state->Init_Ctrl[11].bit[2] = 5; MXL5005_ControlInit()
842 state->Init_Ctrl[11].val[2] = 0; MXL5005_ControlInit()
843 state->Init_Ctrl[11].addr[3] = 43; MXL5005_ControlInit()
844 state->Init_Ctrl[11].bit[3] = 6; MXL5005_ControlInit()
845 state->Init_Ctrl[11].val[3] = 1; MXL5005_ControlInit()
846 state->Init_Ctrl[11].addr[4] = 43; MXL5005_ControlInit()
847 state->Init_Ctrl[11].bit[4] = 7; MXL5005_ControlInit()
848 state->Init_Ctrl[11].val[4] = 0; MXL5005_ControlInit()
850 state->Init_Ctrl[12].Ctrl_Num = IF_VCO_BIAS ; MXL5005_ControlInit()
851 state->Init_Ctrl[12].size = 6 ; MXL5005_ControlInit()
852 state->Init_Ctrl[12].addr[0] = 44; MXL5005_ControlInit()
853 state->Init_Ctrl[12].bit[0] = 2; MXL5005_ControlInit()
854 state->Init_Ctrl[12].val[0] = 0; MXL5005_ControlInit()
855 state->Init_Ctrl[12].addr[1] = 44; MXL5005_ControlInit()
856 state->Init_Ctrl[12].bit[1] = 3; MXL5005_ControlInit()
857 state->Init_Ctrl[12].val[1] = 0; MXL5005_ControlInit()
858 state->Init_Ctrl[12].addr[2] = 44; MXL5005_ControlInit()
859 state->Init_Ctrl[12].bit[2] = 4; MXL5005_ControlInit()
860 state->Init_Ctrl[12].val[2] = 0; MXL5005_ControlInit()
861 state->Init_Ctrl[12].addr[3] = 44; MXL5005_ControlInit()
862 state->Init_Ctrl[12].bit[3] = 5; MXL5005_ControlInit()
863 state->Init_Ctrl[12].val[3] = 1; MXL5005_ControlInit()
864 state->Init_Ctrl[12].addr[4] = 44; MXL5005_ControlInit()
865 state->Init_Ctrl[12].bit[4] = 6; MXL5005_ControlInit()
866 state->Init_Ctrl[12].val[4] = 0; MXL5005_ControlInit()
867 state->Init_Ctrl[12].addr[5] = 44; MXL5005_ControlInit()
868 state->Init_Ctrl[12].bit[5] = 7; MXL5005_ControlInit()
869 state->Init_Ctrl[12].val[5] = 0; MXL5005_ControlInit()
871 state->Init_Ctrl[13].Ctrl_Num = CHCAL_INT_MOD_IF ; MXL5005_ControlInit()
872 state->Init_Ctrl[13].size = 7 ; MXL5005_ControlInit()
873 state->Init_Ctrl[13].addr[0] = 11; MXL5005_ControlInit()
874 state->Init_Ctrl[13].bit[0] = 0; MXL5005_ControlInit()
875 state->Init_Ctrl[13].val[0] = 1; MXL5005_ControlInit()
876 state->Init_Ctrl[13].addr[1] = 11; MXL5005_ControlInit()
877 state->Init_Ctrl[13].bit[1] = 1; MXL5005_ControlInit()
878 state->Init_Ctrl[13].val[1] = 0; MXL5005_ControlInit()
879 state->Init_Ctrl[13].addr[2] = 11; MXL5005_ControlInit()
880 state->Init_Ctrl[13].bit[2] = 2; MXL5005_ControlInit()
881 state->Init_Ctrl[13].val[2] = 0; MXL5005_ControlInit()
882 state->Init_Ctrl[13].addr[3] = 11; MXL5005_ControlInit()
883 state->Init_Ctrl[13].bit[3] = 3; MXL5005_ControlInit()
884 state->Init_Ctrl[13].val[3] = 1; MXL5005_ControlInit()
885 state->Init_Ctrl[13].addr[4] = 11; MXL5005_ControlInit()
886 state->Init_Ctrl[13].bit[4] = 4; MXL5005_ControlInit()
887 state->Init_Ctrl[13].val[4] = 1; MXL5005_ControlInit()
888 state->Init_Ctrl[13].addr[5] = 11; MXL5005_ControlInit()
889 state->Init_Ctrl[13].bit[5] = 5; MXL5005_ControlInit()
890 state->Init_Ctrl[13].val[5] = 0; MXL5005_ControlInit()
891 state->Init_Ctrl[13].addr[6] = 11; MXL5005_ControlInit()
892 state->Init_Ctrl[13].bit[6] = 6; MXL5005_ControlInit()
893 state->Init_Ctrl[13].val[6] = 0; MXL5005_ControlInit()
895 state->Init_Ctrl[14].Ctrl_Num = CHCAL_FRAC_MOD_IF ; MXL5005_ControlInit()
896 state->Init_Ctrl[14].size = 16 ; MXL5005_ControlInit()
897 state->Init_Ctrl[14].addr[0] = 13; MXL5005_ControlInit()
898 state->Init_Ctrl[14].bit[0] = 0; MXL5005_ControlInit()
899 state->Init_Ctrl[14].val[0] = 0; MXL5005_ControlInit()
900 state->Init_Ctrl[14].addr[1] = 13; MXL5005_ControlInit()
901 state->Init_Ctrl[14].bit[1] = 1; MXL5005_ControlInit()
902 state->Init_Ctrl[14].val[1] = 0; MXL5005_ControlInit()
903 state->Init_Ctrl[14].addr[2] = 13; MXL5005_ControlInit()
904 state->Init_Ctrl[14].bit[2] = 2; MXL5005_ControlInit()
905 state->Init_Ctrl[14].val[2] = 0; MXL5005_ControlInit()
906 state->Init_Ctrl[14].addr[3] = 13; MXL5005_ControlInit()
907 state->Init_Ctrl[14].bit[3] = 3; MXL5005_ControlInit()
908 state->Init_Ctrl[14].val[3] = 0; MXL5005_ControlInit()
909 state->Init_Ctrl[14].addr[4] = 13; MXL5005_ControlInit()
910 state->Init_Ctrl[14].bit[4] = 4; MXL5005_ControlInit()
911 state->Init_Ctrl[14].val[4] = 0; MXL5005_ControlInit()
912 state->Init_Ctrl[14].addr[5] = 13; MXL5005_ControlInit()
913 state->Init_Ctrl[14].bit[5] = 5; MXL5005_ControlInit()
914 state->Init_Ctrl[14].val[5] = 0; MXL5005_ControlInit()
915 state->Init_Ctrl[14].addr[6] = 13; MXL5005_ControlInit()
916 state->Init_Ctrl[14].bit[6] = 6; MXL5005_ControlInit()
917 state->Init_Ctrl[14].val[6] = 0; MXL5005_ControlInit()
918 state->Init_Ctrl[14].addr[7] = 13; MXL5005_ControlInit()
919 state->Init_Ctrl[14].bit[7] = 7; MXL5005_ControlInit()
920 state->Init_Ctrl[14].val[7] = 0; MXL5005_ControlInit()
921 state->Init_Ctrl[14].addr[8] = 12; MXL5005_ControlInit()
922 state->Init_Ctrl[14].bit[8] = 0; MXL5005_ControlInit()
923 state->Init_Ctrl[14].val[8] = 0; MXL5005_ControlInit()
924 state->Init_Ctrl[14].addr[9] = 12; MXL5005_ControlInit()
925 state->Init_Ctrl[14].bit[9] = 1; MXL5005_ControlInit()
926 state->Init_Ctrl[14].val[9] = 0; MXL5005_ControlInit()
927 state->Init_Ctrl[14].addr[10] = 12; MXL5005_ControlInit()
928 state->Init_Ctrl[14].bit[10] = 2; MXL5005_ControlInit()
929 state->Init_Ctrl[14].val[10] = 0; MXL5005_ControlInit()
930 state->Init_Ctrl[14].addr[11] = 12; MXL5005_ControlInit()
931 state->Init_Ctrl[14].bit[11] = 3; MXL5005_ControlInit()
932 state->Init_Ctrl[14].val[11] = 0; MXL5005_ControlInit()
933 state->Init_Ctrl[14].addr[12] = 12; MXL5005_ControlInit()
934 state->Init_Ctrl[14].bit[12] = 4; MXL5005_ControlInit()
935 state->Init_Ctrl[14].val[12] = 0; MXL5005_ControlInit()
936 state->Init_Ctrl[14].addr[13] = 12; MXL5005_ControlInit()
937 state->Init_Ctrl[14].bit[13] = 5; MXL5005_ControlInit()
938 state->Init_Ctrl[14].val[13] = 1; MXL5005_ControlInit()
939 state->Init_Ctrl[14].addr[14] = 12; MXL5005_ControlInit()
940 state->Init_Ctrl[14].bit[14] = 6; MXL5005_ControlInit()
941 state->Init_Ctrl[14].val[14] = 1; MXL5005_ControlInit()
942 state->Init_Ctrl[14].addr[15] = 12; MXL5005_ControlInit()
943 state->Init_Ctrl[14].bit[15] = 7; MXL5005_ControlInit()
944 state->Init_Ctrl[14].val[15] = 0; MXL5005_ControlInit()
946 state->Init_Ctrl[15].Ctrl_Num = DRV_RES_SEL ; MXL5005_ControlInit()
947 state->Init_Ctrl[15].size = 3 ; MXL5005_ControlInit()
948 state->Init_Ctrl[15].addr[0] = 147; MXL5005_ControlInit()
949 state->Init_Ctrl[15].bit[0] = 2; MXL5005_ControlInit()
950 state->Init_Ctrl[15].val[0] = 0; MXL5005_ControlInit()
951 state->Init_Ctrl[15].addr[1] = 147; MXL5005_ControlInit()
952 state->Init_Ctrl[15].bit[1] = 3; MXL5005_ControlInit()
953 state->Init_Ctrl[15].val[1] = 1; MXL5005_ControlInit()
954 state->Init_Ctrl[15].addr[2] = 147; MXL5005_ControlInit()
955 state->Init_Ctrl[15].bit[2] = 4; MXL5005_ControlInit()
956 state->Init_Ctrl[15].val[2] = 1; MXL5005_ControlInit()
958 state->Init_Ctrl[16].Ctrl_Num = I_DRIVER ; MXL5005_ControlInit()
959 state->Init_Ctrl[16].size = 2 ; MXL5005_ControlInit()
960 state->Init_Ctrl[16].addr[0] = 147; MXL5005_ControlInit()
961 state->Init_Ctrl[16].bit[0] = 0; MXL5005_ControlInit()
962 state->Init_Ctrl[16].val[0] = 0; MXL5005_ControlInit()
963 state->Init_Ctrl[16].addr[1] = 147; MXL5005_ControlInit()
964 state->Init_Ctrl[16].bit[1] = 1; MXL5005_ControlInit()
965 state->Init_Ctrl[16].val[1] = 1; MXL5005_ControlInit()
967 state->Init_Ctrl[17].Ctrl_Num = EN_AAF ; MXL5005_ControlInit()
968 state->Init_Ctrl[17].size = 1 ; MXL5005_ControlInit()
969 state->Init_Ctrl[17].addr[0] = 147; MXL5005_ControlInit()
970 state->Init_Ctrl[17].bit[0] = 7; MXL5005_ControlInit()
971 state->Init_Ctrl[17].val[0] = 0; MXL5005_ControlInit()
973 state->Init_Ctrl[18].Ctrl_Num = EN_3P ; MXL5005_ControlInit()
974 state->Init_Ctrl[18].size = 1 ; MXL5005_ControlInit()
975 state->Init_Ctrl[18].addr[0] = 147; MXL5005_ControlInit()
976 state->Init_Ctrl[18].bit[0] = 6; MXL5005_ControlInit()
977 state->Init_Ctrl[18].val[0] = 0; MXL5005_ControlInit()
979 state->Init_Ctrl[19].Ctrl_Num = EN_AUX_3P ; MXL5005_ControlInit()
980 state->Init_Ctrl[19].size = 1 ; MXL5005_ControlInit()
981 state->Init_Ctrl[19].addr[0] = 156; MXL5005_ControlInit()
982 state->Init_Ctrl[19].bit[0] = 0; MXL5005_ControlInit()
983 state->Init_Ctrl[19].val[0] = 0; MXL5005_ControlInit()
985 state->Init_Ctrl[20].Ctrl_Num = SEL_AAF_BAND ; MXL5005_ControlInit()
986 state->Init_Ctrl[20].size = 1 ; MXL5005_ControlInit()
987 state->Init_Ctrl[20].addr[0] = 147; MXL5005_ControlInit()
988 state->Init_Ctrl[20].bit[0] = 5; MXL5005_ControlInit()
989 state->Init_Ctrl[20].val[0] = 0; MXL5005_ControlInit()
991 state->Init_Ctrl[21].Ctrl_Num = SEQ_ENCLK16_CLK_OUT ; MXL5005_ControlInit()
992 state->Init_Ctrl[21].size = 1 ; MXL5005_ControlInit()
993 state->Init_Ctrl[21].addr[0] = 137; MXL5005_ControlInit()
994 state->Init_Ctrl[21].bit[0] = 4; MXL5005_ControlInit()
995 state->Init_Ctrl[21].val[0] = 0; MXL5005_ControlInit()
997 state->Init_Ctrl[22].Ctrl_Num = SEQ_SEL4_16B ; MXL5005_ControlInit()
998 state->Init_Ctrl[22].size = 1 ; MXL5005_ControlInit()
999 state->Init_Ctrl[22].addr[0] = 137; MXL5005_ControlInit()
1000 state->Init_Ctrl[22].bit[0] = 7; MXL5005_ControlInit()
1001 state->Init_Ctrl[22].val[0] = 0; MXL5005_ControlInit()
1003 state->Init_Ctrl[23].Ctrl_Num = XTAL_CAPSELECT ; MXL5005_ControlInit()
1004 state->Init_Ctrl[23].size = 1 ; MXL5005_ControlInit()
1005 state->Init_Ctrl[23].addr[0] = 91; MXL5005_ControlInit()
1006 state->Init_Ctrl[23].bit[0] = 5; MXL5005_ControlInit()
1007 state->Init_Ctrl[23].val[0] = 1; MXL5005_ControlInit()
1009 state->Init_Ctrl[24].Ctrl_Num = IF_SEL_DBL ; MXL5005_ControlInit()
1010 state->Init_Ctrl[24].size = 1 ; MXL5005_ControlInit()
1011 state->Init_Ctrl[24].addr[0] = 43; MXL5005_ControlInit()
1012 state->Init_Ctrl[24].bit[0] = 0; MXL5005_ControlInit()
1013 state->Init_Ctrl[24].val[0] = 1; MXL5005_ControlInit()
1015 state->Init_Ctrl[25].Ctrl_Num = RFSYN_R_DIV ; MXL5005_ControlInit()
1016 state->Init_Ctrl[25].size = 2 ; MXL5005_ControlInit()
1017 state->Init_Ctrl[25].addr[0] = 22; MXL5005_ControlInit()
1018 state->Init_Ctrl[25].bit[0] = 0; MXL5005_ControlInit()
1019 state->Init_Ctrl[25].val[0] = 1; MXL5005_ControlInit()
1020 state->Init_Ctrl[25].addr[1] = 22; MXL5005_ControlInit()
1021 state->Init_Ctrl[25].bit[1] = 1; MXL5005_ControlInit()
1022 state->Init_Ctrl[25].val[1] = 1; MXL5005_ControlInit()
1024 state->Init_Ctrl[26].Ctrl_Num = SEQ_EXTSYNTHCALIF ; MXL5005_ControlInit()
1025 state->Init_Ctrl[26].size = 1 ; MXL5005_ControlInit()
1026 state->Init_Ctrl[26].addr[0] = 134; MXL5005_ControlInit()
1027 state->Init_Ctrl[26].bit[0] = 2; MXL5005_ControlInit()
1028 state->Init_Ctrl[26].val[0] = 0; MXL5005_ControlInit()
1030 state->Init_Ctrl[27].Ctrl_Num = SEQ_EXTDCCAL ; MXL5005_ControlInit()
1031 state->Init_Ctrl[27].size = 1 ; MXL5005_ControlInit()
1032 state->Init_Ctrl[27].addr[0] = 137; MXL5005_ControlInit()
1033 state->Init_Ctrl[27].bit[0] = 3; MXL5005_ControlInit()
1034 state->Init_Ctrl[27].val[0] = 0; MXL5005_ControlInit()
1036 state->Init_Ctrl[28].Ctrl_Num = AGC_EN_RSSI ; MXL5005_ControlInit()
1037 state->Init_Ctrl[28].size = 1 ; MXL5005_ControlInit()
1038 state->Init_Ctrl[28].addr[0] = 77; MXL5005_ControlInit()
1039 state->Init_Ctrl[28].bit[0] = 7; MXL5005_ControlInit()
1040 state->Init_Ctrl[28].val[0] = 0; MXL5005_ControlInit()
1042 state->Init_Ctrl[29].Ctrl_Num = RFA_ENCLKRFAGC ; MXL5005_ControlInit()
1043 state->Init_Ctrl[29].size = 1 ; MXL5005_ControlInit()
1044 state->Init_Ctrl[29].addr[0] = 166; MXL5005_ControlInit()
1045 state->Init_Ctrl[29].bit[0] = 7; MXL5005_ControlInit()
1046 state->Init_Ctrl[29].val[0] = 1; MXL5005_ControlInit()
1048 state->Init_Ctrl[30].Ctrl_Num = RFA_RSSI_REFH ; MXL5005_ControlInit()
1049 state->Init_Ctrl[30].size = 3 ; MXL5005_ControlInit()
1050 state->Init_Ctrl[30].addr[0] = 166; MXL5005_ControlInit()
1051 state->Init_Ctrl[30].bit[0] = 0; MXL5005_ControlInit()
1052 state->Init_Ctrl[30].val[0] = 0; MXL5005_ControlInit()
1053 state->Init_Ctrl[30].addr[1] = 166; MXL5005_ControlInit()
1054 state->Init_Ctrl[30].bit[1] = 1; MXL5005_ControlInit()
1055 state->Init_Ctrl[30].val[1] = 1; MXL5005_ControlInit()
1056 state->Init_Ctrl[30].addr[2] = 166; MXL5005_ControlInit()
1057 state->Init_Ctrl[30].bit[2] = 2; MXL5005_ControlInit()
1058 state->Init_Ctrl[30].val[2] = 1; MXL5005_ControlInit()
1060 state->Init_Ctrl[31].Ctrl_Num = RFA_RSSI_REF ; MXL5005_ControlInit()
1061 state->Init_Ctrl[31].size = 3 ; MXL5005_ControlInit()
1062 state->Init_Ctrl[31].addr[0] = 166; MXL5005_ControlInit()
1063 state->Init_Ctrl[31].bit[0] = 3; MXL5005_ControlInit()
1064 state->Init_Ctrl[31].val[0] = 1; MXL5005_ControlInit()
1065 state->Init_Ctrl[31].addr[1] = 166; MXL5005_ControlInit()
1066 state->Init_Ctrl[31].bit[1] = 4; MXL5005_ControlInit()
1067 state->Init_Ctrl[31].val[1] = 0; MXL5005_ControlInit()
1068 state->Init_Ctrl[31].addr[2] = 166; MXL5005_ControlInit()
1069 state->Init_Ctrl[31].bit[2] = 5; MXL5005_ControlInit()
1070 state->Init_Ctrl[31].val[2] = 1; MXL5005_ControlInit()
1072 state->Init_Ctrl[32].Ctrl_Num = RFA_RSSI_REFL ; MXL5005_ControlInit()
1073 state->Init_Ctrl[32].size = 3 ; MXL5005_ControlInit()
1074 state->Init_Ctrl[32].addr[0] = 167; MXL5005_ControlInit()
1075 state->Init_Ctrl[32].bit[0] = 0; MXL5005_ControlInit()
1076 state->Init_Ctrl[32].val[0] = 1; MXL5005_ControlInit()
1077 state->Init_Ctrl[32].addr[1] = 167; MXL5005_ControlInit()
1078 state->Init_Ctrl[32].bit[1] = 1; MXL5005_ControlInit()
1079 state->Init_Ctrl[32].val[1] = 1; MXL5005_ControlInit()
1080 state->Init_Ctrl[32].addr[2] = 167; MXL5005_ControlInit()
1081 state->Init_Ctrl[32].bit[2] = 2; MXL5005_ControlInit()
1082 state->Init_Ctrl[32].val[2] = 0; MXL5005_ControlInit()
1084 state->Init_Ctrl[33].Ctrl_Num = RFA_FLR ; MXL5005_ControlInit()
1085 state->Init_Ctrl[33].size = 4 ; MXL5005_ControlInit()
1086 state->Init_Ctrl[33].addr[0] = 168; MXL5005_ControlInit()
1087 state->Init_Ctrl[33].bit[0] = 0; MXL5005_ControlInit()
1088 state->Init_Ctrl[33].val[0] = 0; MXL5005_ControlInit()
1089 state->Init_Ctrl[33].addr[1] = 168; MXL5005_ControlInit()
1090 state->Init_Ctrl[33].bit[1] = 1; MXL5005_ControlInit()
1091 state->Init_Ctrl[33].val[1] = 1; MXL5005_ControlInit()
1092 state->Init_Ctrl[33].addr[2] = 168; MXL5005_ControlInit()
1093 state->Init_Ctrl[33].bit[2] = 2; MXL5005_ControlInit()
1094 state->Init_Ctrl[33].val[2] = 0; MXL5005_ControlInit()
1095 state->Init_Ctrl[33].addr[3] = 168; MXL5005_ControlInit()
1096 state->Init_Ctrl[33].bit[3] = 3; MXL5005_ControlInit()
1097 state->Init_Ctrl[33].val[3] = 0; MXL5005_ControlInit()
1099 state->Init_Ctrl[34].Ctrl_Num = RFA_CEIL ; MXL5005_ControlInit()
1100 state->Init_Ctrl[34].size = 4 ; MXL5005_ControlInit()
1101 state->Init_Ctrl[34].addr[0] = 168; MXL5005_ControlInit()
1102 state->Init_Ctrl[34].bit[0] = 4; MXL5005_ControlInit()
1103 state->Init_Ctrl[34].val[0] = 1; MXL5005_ControlInit()
1104 state->Init_Ctrl[34].addr[1] = 168; MXL5005_ControlInit()
1105 state->Init_Ctrl[34].bit[1] = 5; MXL5005_ControlInit()
1106 state->Init_Ctrl[34].val[1] = 1; MXL5005_ControlInit()
1107 state->Init_Ctrl[34].addr[2] = 168; MXL5005_ControlInit()
1108 state->Init_Ctrl[34].bit[2] = 6; MXL5005_ControlInit()
1109 state->Init_Ctrl[34].val[2] = 1; MXL5005_ControlInit()
1110 state->Init_Ctrl[34].addr[3] = 168; MXL5005_ControlInit()
1111 state->Init_Ctrl[34].bit[3] = 7; MXL5005_ControlInit()
1112 state->Init_Ctrl[34].val[3] = 1; MXL5005_ControlInit()
1114 state->Init_Ctrl[35].Ctrl_Num = SEQ_EXTIQFSMPULSE ; MXL5005_ControlInit()
1115 state->Init_Ctrl[35].size = 1 ; MXL5005_ControlInit()
1116 state->Init_Ctrl[35].addr[0] = 135; MXL5005_ControlInit()
1117 state->Init_Ctrl[35].bit[0] = 0; MXL5005_ControlInit()
1118 state->Init_Ctrl[35].val[0] = 0; MXL5005_ControlInit()
1120 state->Init_Ctrl[36].Ctrl_Num = OVERRIDE_1 ; MXL5005_ControlInit()
1121 state->Init_Ctrl[36].size = 1 ; MXL5005_ControlInit()
1122 state->Init_Ctrl[36].addr[0] = 56; MXL5005_ControlInit()
1123 state->Init_Ctrl[36].bit[0] = 3; MXL5005_ControlInit()
1124 state->Init_Ctrl[36].val[0] = 0; MXL5005_ControlInit()
1126 state->Init_Ctrl[37].Ctrl_Num = BB_INITSTATE_DLPF_TUNE ; MXL5005_ControlInit()
1127 state->Init_Ctrl[37].size = 7 ; MXL5005_ControlInit()
1128 state->Init_Ctrl[37].addr[0] = 59; MXL5005_ControlInit()
1129 state->Init_Ctrl[37].bit[0] = 1; MXL5005_ControlInit()
1130 state->Init_Ctrl[37].val[0] = 0; MXL5005_ControlInit()
1131 state->Init_Ctrl[37].addr[1] = 59; MXL5005_ControlInit()
1132 state->Init_Ctrl[37].bit[1] = 2; MXL5005_ControlInit()
1133 state->Init_Ctrl[37].val[1] = 0; MXL5005_ControlInit()
1134 state->Init_Ctrl[37].addr[2] = 59; MXL5005_ControlInit()
1135 state->Init_Ctrl[37].bit[2] = 3; MXL5005_ControlInit()
1136 state->Init_Ctrl[37].val[2] = 0; MXL5005_ControlInit()
1137 state->Init_Ctrl[37].addr[3] = 59; MXL5005_ControlInit()
1138 state->Init_Ctrl[37].bit[3] = 4; MXL5005_ControlInit()
1139 state->Init_Ctrl[37].val[3] = 0; MXL5005_ControlInit()
1140 state->Init_Ctrl[37].addr[4] = 59; MXL5005_ControlInit()
1141 state->Init_Ctrl[37].bit[4] = 5; MXL5005_ControlInit()
1142 state->Init_Ctrl[37].val[4] = 0; MXL5005_ControlInit()
1143 state->Init_Ctrl[37].addr[5] = 59; MXL5005_ControlInit()
1144 state->Init_Ctrl[37].bit[5] = 6; MXL5005_ControlInit()
1145 state->Init_Ctrl[37].val[5] = 0; MXL5005_ControlInit()
1146 state->Init_Ctrl[37].addr[6] = 59; MXL5005_ControlInit()
1147 state->Init_Ctrl[37].bit[6] = 7; MXL5005_ControlInit()
1148 state->Init_Ctrl[37].val[6] = 0; MXL5005_ControlInit()
1150 state->Init_Ctrl[38].Ctrl_Num = TG_R_DIV ; MXL5005_ControlInit()
1151 state->Init_Ctrl[38].size = 6 ; MXL5005_ControlInit()
1152 state->Init_Ctrl[38].addr[0] = 32; MXL5005_ControlInit()
1153 state->Init_Ctrl[38].bit[0] = 2; MXL5005_ControlInit()
1154 state->Init_Ctrl[38].val[0] = 0; MXL5005_ControlInit()
1155 state->Init_Ctrl[38].addr[1] = 32; MXL5005_ControlInit()
1156 state->Init_Ctrl[38].bit[1] = 3; MXL5005_ControlInit()
1157 state->Init_Ctrl[38].val[1] = 0; MXL5005_ControlInit()
1158 state->Init_Ctrl[38].addr[2] = 32; MXL5005_ControlInit()
1159 state->Init_Ctrl[38].bit[2] = 4; MXL5005_ControlInit()
1160 state->Init_Ctrl[38].val[2] = 0; MXL5005_ControlInit()
1161 state->Init_Ctrl[38].addr[3] = 32; MXL5005_ControlInit()
1162 state->Init_Ctrl[38].bit[3] = 5; MXL5005_ControlInit()
1163 state->Init_Ctrl[38].val[3] = 0; MXL5005_ControlInit()
1164 state->Init_Ctrl[38].addr[4] = 32; MXL5005_ControlInit()
1165 state->Init_Ctrl[38].bit[4] = 6; MXL5005_ControlInit()
1166 state->Init_Ctrl[38].val[4] = 1; MXL5005_ControlInit()
1167 state->Init_Ctrl[38].addr[5] = 32; MXL5005_ControlInit()
1168 state->Init_Ctrl[38].bit[5] = 7; MXL5005_ControlInit()
1169 state->Init_Ctrl[38].val[5] = 0; MXL5005_ControlInit()
1171 state->Init_Ctrl[39].Ctrl_Num = EN_CHP_LIN_B ; MXL5005_ControlInit()
1172 state->Init_Ctrl[39].size = 1 ; MXL5005_ControlInit()
1173 state->Init_Ctrl[39].addr[0] = 25; MXL5005_ControlInit()
1174 state->Init_Ctrl[39].bit[0] = 3; MXL5005_ControlInit()
1175 state->Init_Ctrl[39].val[0] = 1; MXL5005_ControlInit()
3427 if (controlNum == state->Init_Ctrl[i].Ctrl_Num) { MXL_ControlWrite_Group()
3429 highLimit = 1 << state->Init_Ctrl[i].size; MXL_ControlWrite_Group()
3431 for (j = 0; j < state->Init_Ctrl[i].size; j++) { MXL_ControlWrite_Group()
3432 state->Init_Ctrl[i].val[j] = (u8)((value >> j) & 0x01); MXL_ControlWrite_Group()
3433 MXL_RegWriteBit(fe, (u8)(state->Init_Ctrl[i].addr[j]), MXL_ControlWrite_Group()
3434 (u8)(state->Init_Ctrl[i].bit[j]), MXL_ControlWrite_Group()
3438 for (k = 0; k < state->Init_Ctrl[i].size; k++) MXL_ControlWrite_Group()
3439 ctrlVal += state->Init_Ctrl[i].val[k] * (1 << k); MXL_ControlWrite_Group()
3519 if (controlNum == state->Init_Ctrl[i].Ctrl_Num) { MXL_ControlRead()
3522 for (k = 0; k < state->Init_Ctrl[i].size; k++) MXL_ControlRead()
3523 ctrlVal += state->Init_Ctrl[i].val[k] * (1<<k); MXL_ControlRead()

Completed in 106 milliseconds