Searched refs:IPU_CHA_BUF1_RDY (Results 1 - 4 of 4) sorted by relevance

/linux-4.4.14/drivers/dma/ipu/
H A Dipu_intern.h22 #define IPU_CHA_BUF1_RDY 0x08 macro
H A Dipu_idmac.c85 idmac_read_ipureg(ipu, IPU_CHA_BUF1_RDY), dump_idmac_reg()
721 idmac_write_ipureg(&ipu_data, 1UL << channel, IPU_CHA_BUF1_RDY); ipu_select_buffer()
753 reg = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF1_RDY); ipu_update_channel_buffer()
1095 idmac_read_ipureg(ipu, IPU_CHA_BUF1_RDY), ipu_disable_channel()
1176 ready1 = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF1_RDY); idmac_interrupt()
/linux-4.4.14/drivers/gpu/ipu-v3/
H A Dipu-common.c477 reg = ipu_cm_read(ipu, IPU_CHA_BUF1_RDY(channel->num)); ipu_idmac_buffer_is_ready()
501 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF1_RDY(chno)); ipu_idmac_select_buffer()
521 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF1_RDY(chno)); ipu_idmac_clear_buffer()
616 if (ipu_cm_read(ipu, IPU_CHA_BUF1_RDY(channel->num)) & ipu_idmac_disable_channel()
619 IPU_CHA_BUF1_RDY(channel->num)); ipu_idmac_disable_channel()
H A Dipu-prv.h70 #define IPU_CHA_BUF1_RDY(ch) IPU_CM_REG(0x0270 + 4 * ((ch) / 32)) macro

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