Searched refs:IOAT_CHANERR_OFFSET (Results 1 - 5 of 5) sorted by relevance

/linux-4.4.14/drivers/dma/ioat/
H A Ddma.c712 u32 chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET); ioat_cleanup()
759 chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET); ioat_eh()
806 writel(chanerr, ioat_chan->reg_base + IOAT_CHANERR_OFFSET); ioat_eh()
855 chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET); ioat_timer_event()
956 chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET); ioat_reset_hw()
957 writel(chanerr, ioat_chan->reg_base + IOAT_CHANERR_OFFSET); ioat_reset_hw()
H A Dregisters.h224 #define IOAT_CHANERR_OFFSET 0x28 /* 32-bit Channel Error Register */ macro
H A Dinit.c742 chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET); ioat_alloc_chan_resources()
1230 chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET); ioat_resume()
1231 writel(chanerr, ioat_chan->reg_base + IOAT_CHANERR_OFFSET); ioat_resume()
H A Ddma.h282 return readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET); ioat_chanerr()
/linux-4.4.14/drivers/idle/
H A Di7300_idle.c109 err = readl(ioat_chanbase + IOAT_CHANERR_OFFSET); i7300_idle_ioat_start()
111 writel(err, ioat_chanbase + IOAT_CHANERR_OFFSET); i7300_idle_ioat_start()

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