Searched refs:HIT (Results 1 – 5 of 5) sorted by relevance
| /linux-4.4.14/arch/x86/kernel/cpu/ |
| D | perf_event_intel_ds.c | 51 #define OP_LH (P(OP, LOAD) | P(LVL, HIT))
62 OP_LH | P(LVL, L3) | P(SNOOP, HIT), /* 0x06: L3 hit, snoop hit */
64 OP_LH | P(LVL, REM_CCE1) | P(SNOOP, HIT), /* 0x08: L3 miss snoop hit */
66 OP_LH | P(LVL, LOC_RAM) | P(SNOOP, HIT), /* 0x0a: L3 miss, shared */
67 OP_LH | P(LVL, REM_RAM1) | P(SNOOP, HIT), /* 0x0b: L3 miss, shared */
77 pebs_data_source[0x05] = OP_LH | P(LVL, L3) | P(SNOOP, HIT); in intel_pmu_pebs_data_source_nhm()
99 val |= P(TLB, HIT); in precise_store_data()
107 val |= P(LVL, HIT); in precise_store_data()
178 val |= P(TLB, HIT) | P(TLB, L1) | P(TLB, L2); in load_latency_data()
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| D | perf_event_p4.c | 97 P4_ESCR_EMASK_BIT(P4_EVENT_ITLB_REFERENCE, HIT) |
547 [ C(RESULT_ACCESS) ] = P4_GEN_CACHE_EVENT(P4_EVENT_ITLB_REFERENCE, HIT,
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| /linux-4.4.14/arch/x86/include/asm/ |
| D | perf_event_p4.h | 604 P4_GEN_ESCR_EMASK(P4_EVENT_ITLB_REFERENCE, HIT, 0),
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| /linux-4.4.14/Documentation/device-mapper/ |
| D | cache-policies.txt | 11 The policy can return a simple HIT or MISS or issue a migration.
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| /linux-4.4.14/drivers/iommu/ |
| D | msm_iommu_hw-8xxx.h | 624 #define SET_HIT(b, c, v) SET_CONTEXT_FIELD(b, c, V2PSR, HIT, v)
811 #define GET_HIT(b, c) GET_CONTEXT_FIELD(b, c, V2PSR, HIT)
1191 #define HIT (HIT_MASK << HIT_SHIFT) macro
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