Searched refs:HDMI_ACR_48_0 (Results 1 – 5 of 5) sorted by relevance
93 WREG32(HDMI_ACR_48_0 + offset, HDMI_ACR_CTS_48(acr->cts_48khz)); in evergreen_hdmi_update_acr()
794 #define HDMI_ACR_48_0 0x74bc macro
649 #define HDMI_ACR_48_0 0x70ec macro
1695 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_0, HDMI_ACR_CTS_48, acr.cts_48khz); in dce_v11_0_afmt_update_ACR()
1707 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_0, HDMI_ACR_CTS_48, acr.cts_48khz); in dce_v10_0_afmt_update_ACR()