Searched refs:EMC_CFG (Results 1 - 3 of 3) sorted by relevance

/linux-4.4.14/arch/arm/mach-tegra/
H A Dsleep-tegra30.S29 #define EMC_CFG 0xc define
449 ldr r1, [r0, #EMC_CFG]
451 str r1, [r0, #EMC_CFG]
518 ldr r1, [r5, #0x0] @ restore EMC_CFG
519 str r1, [r0, #EMC_CFG]
538 .word TEGRA_EMC_BASE + EMC_CFG @0x0
549 .word TEGRA_EMC0_BASE + EMC_CFG @0x0
557 .word TEGRA_EMC1_BASE + EMC_CFG @0x20
565 .word TEGRA124_EMC_BASE + EMC_CFG @0x0
753 ldr r1, [r0, #EMC_CFG]
756 str r1, [r0, #EMC_CFG] @ disable DYN_SELF_REF
H A Dsleep-tegra20.S32 #define EMC_CFG 0xc define
387 ldr r1, [r0, #EMC_CFG]
389 str r1, [r0, #EMC_CFG]
/linux-4.4.14/drivers/memory/tegra/
H A Dtegra124-emc.c40 #define EMC_CFG 0xc macro
590 val = readl(emc->regs + EMC_CFG); tegra_emc_prepare_timing_change()
593 writel(val, emc->regs + EMC_CFG); tegra_emc_prepare_timing_change()
676 emc_ccfifo_writel(emc, val, EMC_CFG); tegra_emc_prepare_timing_change()
813 writel(timing->emc_cfg, emc->regs + EMC_CFG); tegra_emc_complete_timing_change()
859 timing->emc_cfg = readl(emc->regs + EMC_CFG); emc_read_current_timing()

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