Searched refs:DA732X_REG_PLL_DIV_MID (Results 1 – 2 of 2) sorted by relevance
72 #define DA732X_REG_PLL_DIV_MID 0x51 macro
100 { DA732X_REG_PLL_DIV_MID , 0x00 },1172 snd_soc_write(codec, DA732X_REG_PLL_DIV_MID, div_mid); in da732x_set_dai_pll()