| /linux-4.4.14/arch/x86/include/asm/ |
| H A D | tlbflush.h | 25 * Access to this CR4 shadow and to H/W CR4 is protected by
38 /* Set in this cpu's CR4. */ cr4_set_bits()
51 /* Clear in this cpu's CR4. */ cr4_clear_bits()
64 /* Read the CR4 shadow. */ cr4_read_shadow()
108 * Read-modify-write to CR4 - protect it from preemption and __native_flush_tlb_global()
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| H A D | mmu_context.h | 154 /* Load per-mm CR4 state */ switch_mm()
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| H A D | cpufeature.h | 48 #define X86_FEATURE_FXSR ( 0*32+24) /* FXSAVE/FXRSTOR, CR4.OSFXSR */
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| /linux-4.4.14/tools/testing/selftests/powerpc/switch_endian/ |
| H A D | switch_endian_test.S | 18 /* Setup CR, only CR2-CR4 are maintained */
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| /linux-4.4.14/arch/x86/kernel/cpu/mtrr/ |
| H A D | cyrix.c | 139 /* Save value of CR4 and clear Page Global Enable (bit 7) */ prepare_set()
172 /* Restore value of CR4 */ post_set()
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| H A D | generic.c | 744 /* Save value of CR4 and clear Page Global Enable (bit 7) */ __acquires()
774 /* Restore value of CR4 */ __releases()
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| /linux-4.4.14/arch/x86/kernel/ |
| H A D | relocate_kernel_32.S | 31 #define CR4 DATA(0xc) define
58 movl %eax, CR4(%edi)
198 movl CR4(%edi), %eax
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| H A D | relocate_kernel_64.S | 33 #define CR4 DATA(0x18) define
68 movq %rax, CR4(%r11)
195 movq CR4(%r8), %rax
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| H A D | head_32.S | 350 # which means no CPUID and no CR4
359 jz enable_paging # No flags or only CPUID.FPU = no CR4
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| H A D | process_32.c | 105 printk(KERN_DEFAULT "CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n", __show_regs()
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| H A D | process_64.c | 102 printk(KERN_DEFAULT "CR2: %016lx CR3: %016lx CR4: %016lx\n", cr2, cr3, __show_regs()
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| /linux-4.4.14/drivers/net/wireless/brcm80211/brcmfmac/ |
| H A D | chip.h | 32 * @rambase: RAM base address (only applicable for ARM CR4 chips).
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| H A D | chip.c | 88 /* ARM CR4 core specific control flag bits */
708 brcmf_err("RAM base not provided with ARM CR4 core\n"); brcmf_chip_get_raminfo()
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| /linux-4.4.14/arch/x86/include/uapi/asm/ |
| H A D | processor-flags.h | 83 * Intel CPU features in CR4
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| /linux-4.4.14/drivers/pci/host/ |
| H A D | pcie-spear13xx.c | 122 /* CR4 ID */
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| /linux-4.4.14/drivers/spi/ |
| H A D | spi-sh.c | 60 /* CR4 */
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| /linux-4.4.14/drivers/bcma/ |
| H A D | scan.c | 100 { BCMA_CORE_ARM_CR4, "ARM CR4" },
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| /linux-4.4.14/arch/x86/kernel/fpu/ |
| H A D | init.c | 22 * Initialize the registers found in all CPUs, CR0 and CR4:
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| /linux-4.4.14/arch/x86/kernel/cpu/ |
| H A D | common.c | 1336 * Initialize the CR4 shadow before doing anything that could cpu_init()
1437 * Initialize the CR4 shadow before doing anything that could cpu_init()
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| H A D | intel.c | 156 * be false so that __flush_tlb_all() causes CR3 insted of CR4.PGE early_init_intel()
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| /linux-4.4.14/drivers/dma/ |
| H A D | pl330.c | 134 #define CR4 0xe10 macro
1747 pl330->pcfg.peri_ns = readl(regs + CR4); read_dmac_config()
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| /linux-4.4.14/arch/x86/xen/ |
| H A D | enlighten.c | 451 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ xen_init_cpuid_mask()
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| /linux-4.4.14/drivers/staging/xgifb/ |
| H A D | vb_setmode.c | 408 /* Tempax: CR4 HRS */ XGI_SetXG21CRTC()
503 /* Tempax: CR4 HRS */ XGI_SetXG27CRTC()
526 /* Tempax: CR4 HRS */ XGI_SetXG27CRTC()
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| /linux-4.4.14/arch/x86/kvm/ |
| H A D | emulate.c | 2487 * CR0/CR3/CR4/EFER. It's all a bit more complicated if the vCPU em_rsm()
2494 /* Zero CR4.PCIDE before CR0.PG. */ em_rsm()
2512 /* Now clear CR4.PAE (which must be done before clearing EFER.LME). */ em_rsm()
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| H A D | vmx.c | 1800 * NX is needed to handle CR0.WP=1, CR4.SMEP=1. Testing update_transition_efer()
1802 * or CR4. Host SMEP is anyway a requirement for guest SMEP. update_transition_efer()
3787 * this bit, even if host CR4.MCE == 0. vmx_set_cr4()
4638 /* Save the most likely value for this task's CR4 in the VMCS. */ vmx_set_constant_host_state()
7949 pr_err("CR4: actual=0x%016lx, shadow=0x%016lx, gh_mask=%016lx\n", dump_vmcs()
8009 pr_err("CR0=%016lx CR3=%016lx CR4=%016lx\n", dump_vmcs()
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| H A D | mmu.c | 3827 * bit is only meaningful if the SMAP bit is set in CR4. update_permission_bitmask()
3848 * - X86_CR4_SMAP is set in CR4 update_permission_bitmask()
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| H A D | svm.c | 223 VMCB_CR, /* CR0, CR3, CR4, EFER */
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| /linux-4.4.14/drivers/video/fbdev/sis/ |
| H A D | init.c | 3338 SiS_Pr->CCRT1CRTC[4] = (SiS_Pr->CHSyncStart >> 3) + 3; /* CR4 */ SiS_CalcCRRegisters()
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| H A D | init301.c | 5225 /* CR0 CR1 CR2 CR3 CR4 CR5 CR6 CR7 */ SiS_SetGroup1_301()
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