Searched refs:CLR_REG (Results 1 - 4 of 4) sorted by relevance

/linux-4.4.14/drivers/irqchip/
H A Dirq-mxs.c43 #define CLR_REG 8 macro
105 icoll_priv.intr + CLR_REG + HW_ICOLL_INTERRUPTn(d->hwirq)); icoll_mask_irq()
117 icoll_intr_reg(d) + CLR_REG); asm9260_mask_irq()
/linux-4.4.14/drivers/clocksource/
H A Dasm9260_timer.c33 #define CLR_REG 8 macro
126 writel_relaxed(BM_C0_EN, priv.base + HW_TCR + CLR_REG); __asm9260_timer_shutdown()
151 priv.base + HW_MCR + CLR_REG); asm9260_timer_set_periodic()
/linux-4.4.14/drivers/pinctrl/sirf/
H A Dpinctrl-atlas7.c38 #define CLR_REG(r) ((r) + 0x04) macro
4962 pmx->regs[BANK_DS] + CLR_REG(mux->dinput_reg)); __atlas7_pmx_pin_input_disable_set()
4968 pmx->regs[BANK_DS] + CLR_REG(mux->dinput_val_reg)); __atlas7_pmx_pin_input_disable_set()
4980 pmx->regs[BANK_DS] + CLR_REG(mux->dinput_reg)); __atlas7_pmx_pin_input_disable_clr()
4985 pmx->regs[BANK_DS] + CLR_REG(mux->dinput_val_reg)); __atlas7_pmx_pin_input_disable_clr()
4999 pmx->regs[bank] + CLR_REG(conf->ad_ctrl_reg)); __atlas7_pmx_pin_ad_sel()
5069 pmx->regs[bank] + CLR_REG(conf->mux_reg)); __atlas7_pmx_pin_enable()
5160 writel(pull_info->mask << conf->pupd_bit, CLR_REG(pull_sel_reg)); altas7_pinctrl_set_pull_sel()
5184 writel(ds_info->imval << conf->drvstr_bit, CLR_REG(ds_sel_reg)); __altas7_pinctrl_set_drive_strength_sel()
/linux-4.4.14/drivers/i2c/busses/
H A Di2c-eg20t.c68 #define CLR_REG 0x0 macro

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