Searched refs:CCM_PCDR1 (Results 1 - 3 of 3) sorted by relevance

/linux-4.4.14/drivers/clk/imx/
H A Dclk-imx21.c33 #define CCM_PCDR1 (ccm + 0x1c) macro
77 clk[IMX21_CLK_PER1] = imx_clk_divider("per1", "mpll_gate", CCM_PCDR1, 0, 6); _mx21_clocks_init()
78 clk[IMX21_CLK_PER2] = imx_clk_divider("per2", "mpll_gate", CCM_PCDR1, 8, 6); _mx21_clocks_init()
79 clk[IMX21_CLK_PER3] = imx_clk_divider("per3", "mpll_gate", CCM_PCDR1, 16, 6); _mx21_clocks_init()
80 clk[IMX21_CLK_PER4] = imx_clk_divider("per4", "mpll_gate", CCM_PCDR1, 24, 6); _mx21_clocks_init()
H A Dclk-imx27.c27 #define CCM_PCDR1 (ccm + 0x1c) macro
88 clk[IMX27_CLK_PER1_DIV] = imx_clk_divider("per1_div", "mpll_main2", CCM_PCDR1, 0, 6); _mx27_clocks_init()
89 clk[IMX27_CLK_PER2_DIV] = imx_clk_divider("per2_div", "mpll_main2", CCM_PCDR1, 8, 6); _mx27_clocks_init()
90 clk[IMX27_CLK_PER3_DIV] = imx_clk_divider("per3_div", "mpll_main2", CCM_PCDR1, 16, 6); _mx27_clocks_init()
91 clk[IMX27_CLK_PER4_DIV] = imx_clk_divider("per4_div", "mpll_main2", CCM_PCDR1, 24, 6); _mx27_clocks_init()
H A Dclk-imx25.c39 #define CCM_PCDR1 0x1C macro
137 clk[per4] = imx_clk_divider("per4", "per4_sel", ccm(CCM_PCDR1), 0, 6); __mx25_clocks_init()
138 clk[per5] = imx_clk_divider("per5", "per5_sel", ccm(CCM_PCDR1), 8, 6); __mx25_clocks_init()
139 clk[per6] = imx_clk_divider("per6", "per6_sel", ccm(CCM_PCDR1), 16, 6); __mx25_clocks_init()
140 clk[per7] = imx_clk_divider("per7", "per7_sel", ccm(CCM_PCDR1), 24, 6); __mx25_clocks_init()

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