Searched refs:APBC_TWSI0 (Results 1 - 8 of 8) sorted by relevance
/linux-4.4.14/arch/arm/mach-mmp/ |
H A D | clock-pxa910.c | 26 #define APBC_TWSI0 APBC_REG(0x02c) macro
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H A D | clock-pxa168.c | 24 #define APBC_TWSI0 APBC_REG(0x02c) macro
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/linux-4.4.14/drivers/clk/mmp/ |
H A D | clk-of-pxa168.c | 26 #define APBC_TWSI0 0x2c macro 143 {PXA168_CLK_TWSI0, "twsi0_clk", "pll1_13_1_5", CLK_SET_RATE_PARENT, APBC_TWSI0, 0x3, 0x3, 0x0, 0, &reset_lock},
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H A D | clk-of-pxa910.c | 26 #define APBC_TWSI0 0x2c macro 142 {PXA910_CLK_TWSI0, "twsi0_clk", "pll1_13_1_5", CLK_SET_RATE_PARENT, APBC_TWSI0, 0x3, 0x3, 0x0, 0, &reset_lock},
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H A D | clk-pxa168.c | 25 #define APBC_TWSI0 0x2c macro 167 apbc_base + APBC_TWSI0, 10, 0, &clk_lock); pxa168_clk_init()
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H A D | clk-pxa910.c | 25 #define APBC_TWSI0 0x2c macro 172 apbc_base + APBC_TWSI0, 10, 0, &clk_lock); pxa910_clk_init()
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H A D | clk-mmp2.c | 25 #define APBC_TWSI0 0x4 macro 198 apbc_base + APBC_TWSI0, 10, 0, &clk_lock); mmp2_clk_init()
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H A D | clk-of-mmp2.c | 26 #define APBC_TWSI0 0x4 macro 154 {MMP2_CLK_TWSI0, "twsi0_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI0, 0x7, 0x3, 0x0, 0, &reset_lock},
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