Searched refs:ADAU1761_CLK_ENABLE0 (Results 1 - 1 of 1) sorted by relevance
| /linux-4.4.14/sound/soc/codecs/ |
| H A D | adau1761.c | 47 #define ADAU1761_CLK_ENABLE0 0x40f9 macro
90 { ADAU1761_CLK_ENABLE0, 0x00 },
396 SND_SOC_DAPM_SUPPLY("Serial Port Clock", ADAU1761_CLK_ENABLE0,
398 SND_SOC_DAPM_SUPPLY("Serial Input Routing Clock", ADAU1761_CLK_ENABLE0,
400 SND_SOC_DAPM_SUPPLY("Serial Output Routing Clock", ADAU1761_CLK_ENABLE0,
403 SND_SOC_DAPM_SUPPLY("Decimator Resync Clock", ADAU1761_CLK_ENABLE0,
405 SND_SOC_DAPM_SUPPLY("Interpolator Resync Clock", ADAU1761_CLK_ENABLE0,
408 SND_SOC_DAPM_SUPPLY("Slew Clock", ADAU1761_CLK_ENABLE0, 6, 0, NULL, 0),
409 SND_SOC_DAPM_SUPPLY("ALC Clock", ADAU1761_CLK_ENABLE0, 5, 0, NULL, 0),
629 case ADAU1761_CLK_ENABLE0: adau1761_readable_register()
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