Searched refs:RES0 (Results 1 - 8 of 8) sorted by relevance

/linux-4.4.14/drivers/hwmon/
H A Dlm73.c51 14, /* 11-bits (0.25000 C/LSB): RES1 Bit = 0, RES0 Bit = 0 */
52 28, /* 12-bits (0.12500 C/LSB): RES1 Bit = 0, RES0 Bit = 1 */
53 56, /* 13-bits (0.06250 C/LSB): RES1 Bit = 1, RES0 Bit = 0 */
54 112, /* 14-bits (0.03125 C/LSB): RES1 Bit = 1, RES0 Bit = 1 */
/linux-4.4.14/include/linux/irqchip/
H A Darm-gic-v3.h51 * are implemented as RES0 if ARE is 1 (which we do in KVM's emulated GICv3).
/linux-4.4.14/arch/arm64/kernel/
H A Dcpufeature.c496 * ID_AA64DFR1 is currently RES0. update_cpu_features()
523 * ID_AA64PFR1 is currently RES0. update_cpu_features()
532 * registers should be RES0 otherwise. update_cpu_features()
/linux-4.4.14/Documentation/dvb/
H A Dget_dvb_firmware234 my $RES0="\x01\x92\x7f\x00\x00\x00";
243 print FW "$RES0";
250 print FW "$RES0";
/linux-4.4.14/drivers/staging/iio/resolver/
H A Dad2s1210.c56 /* pin SAMPLE, A0, A1, RES0, RES1, is controlled by driver */
/linux-4.4.14/virt/kvm/arm/
H A Dvgic-v3-emul.c470 /* TARGETSRn is RES0 when ARE=1 */
/linux-4.4.14/arch/blackfin/mach-bf537/boards/
H A Dstamp.c673 /* the RES0 and RES1 pins */
/linux-4.4.14/drivers/hwtracing/coresight/
H A Dcoresight-etm4x.c1780 /* For odd idx pair inversal bit is RES0 */ res_ctrl_store()

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