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Searched refs:mpll_param (Results 1 – 4 of 4) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/radeon/
Dradeon_atombios.c2944 struct atom_mpll_param *mpll_param) in radeon_atom_get_memory_pll_dividers() argument
2951 memset(mpll_param, 0, sizeof(struct atom_mpll_param)); in radeon_atom_get_memory_pll_dividers()
2968 mpll_param->clkfrac = le16_to_cpu(args.ulFbDiv.usFbDivFrac); in radeon_atom_get_memory_pll_dividers()
2969 mpll_param->clkf = le16_to_cpu(args.ulFbDiv.usFbDiv); in radeon_atom_get_memory_pll_dividers()
2970 mpll_param->post_div = args.ucPostDiv; in radeon_atom_get_memory_pll_dividers()
2971 mpll_param->dll_speed = args.ucDllSpeed; in radeon_atom_get_memory_pll_dividers()
2972 mpll_param->bwcntl = args.ucBWCntl; in radeon_atom_get_memory_pll_dividers()
2973 mpll_param->vco_mode = in radeon_atom_get_memory_pll_dividers()
2975 mpll_param->yclk_sel = in radeon_atom_get_memory_pll_dividers()
2977 mpll_param->qdr = in radeon_atom_get_memory_pll_dividers()
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Dci_dpm.c2774 struct atom_mpll_param mpll_param; in ci_calculate_mclk_params() local
2777 ret = radeon_atom_get_memory_pll_dividers(rdev, memory_clock, strobe_mode, &mpll_param); in ci_calculate_mclk_params()
2782 mpll_func_cntl |= BWCTRL(mpll_param.bwcntl); in ci_calculate_mclk_params()
2785 mpll_func_cntl_1 |= CLKF(mpll_param.clkf) | in ci_calculate_mclk_params()
2786 CLKFRAC(mpll_param.clkfrac) | VCO_MODE(mpll_param.vco_mode); in ci_calculate_mclk_params()
2789 mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div); in ci_calculate_mclk_params()
2793 mpll_dq_func_cntl |= YCLK_SEL(mpll_param.yclk_sel) | in ci_calculate_mclk_params()
2794 YCLK_POST_DIV(mpll_param.post_div); in ci_calculate_mclk_params()
2803 if (mpll_param.qdr == 1) in ci_calculate_mclk_params()
2804 freq_nom = memory_clock * 4 * (1 << mpll_param.post_div); in ci_calculate_mclk_params()
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Dsi_dpm.c4829 struct atom_mpll_param mpll_param; in si_populate_mclk_value() local
4832 ret = radeon_atom_get_memory_pll_dividers(rdev, memory_clock, strobe_mode, &mpll_param); in si_populate_mclk_value()
4837 mpll_func_cntl |= BWCTRL(mpll_param.bwcntl); in si_populate_mclk_value()
4840 mpll_func_cntl_1 |= CLKF(mpll_param.clkf) | in si_populate_mclk_value()
4841 CLKFRAC(mpll_param.clkfrac) | VCO_MODE(mpll_param.vco_mode); in si_populate_mclk_value()
4844 mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
4848 mpll_dq_func_cntl |= YCLK_SEL(mpll_param.yclk_sel) | in si_populate_mclk_value()
4849 YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
4879 mclk_pwrmgt_cntl |= DLL_SPEED(mpll_param.dll_speed); in si_populate_mclk_value()
Dradeon.h293 struct atom_mpll_param *mpll_param);