Searched refs:mask_offset (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/arch/arm/mach-davinci/
H A Dmux.h24 .mask_offset = mode_offset, \
35 .mask_offset = mode_offset, \
46 .mask_offset = mode_offset, \
H A Dmux.c72 mask = (cfg->mask << cfg->mask_offset); davinci_cfg_reg()
76 tmp2 = (cfg->mode << cfg->mask_offset); davinci_cfg_reg()
/linux-4.1.27/arch/arm/plat-orion/include/plat/
H A Dorion-gpio.h35 void __iomem *base, int mask_offset,
/linux-4.1.27/arch/arm/mach-omap1/include/mach/
H A Dmux.h42 .mask_offset = mode_offset, \
56 .mask_offset = mode_offset, \
67 .mask_offset = mode_offset, \
79 .mask_offset = mode_offset, \
122 const unsigned char mask_offset; member in struct:pin_config
/linux-4.1.27/arch/arm/plat-orion/
H A Dgpio.c46 int mask_offset; member in struct:orion_gpio_chip
83 return ochip->base + ochip->mask_offset + GPIO_EDGE_MASK_OFF; GPIO_EDGE_MASK()
88 return ochip->base + ochip->mask_offset + GPIO_LEVEL_MASK_OFF; GPIO_LEVEL_MASK()
531 void __iomem *base, int mask_offset, orion_gpio_init()
567 ochip->mask_offset = mask_offset; orion_gpio_init()
595 ct->regs.mask = ochip->mask_offset + GPIO_LEVEL_MASK_OFF; orion_gpio_init()
603 ct->regs.mask = ochip->mask_offset + GPIO_EDGE_MASK_OFF; orion_gpio_init()
529 orion_gpio_init(struct device_node *np, int gpio_base, int ngpio, void __iomem *base, int mask_offset, int secondary_irq_base, int irqs[4]) orion_gpio_init() argument
/linux-4.1.27/arch/arm/mach-omap1/
H A Dmux.c362 mask = (0x7 << cfg->mask_offset); omap1_cfg_reg()
366 tmp2 = (cfg->mask << cfg->mask_offset); omap1_cfg_reg()
/linux-4.1.27/arch/arm/mach-davinci/include/mach/
H A Dmux.h26 const unsigned char mask_offset; member in struct:mux_config

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