| /linux-4.1.27/drivers/isdn/hisax/ |
| H A D | jade.c | 1 /* $Id: jade.c,v 1.9.2.4 2004/01/14 16:04:48 keil Exp $
17 #include "jade.h"
48 /* Write to indirect accessible jade register set */
81 int jade = bcs->hw.hscx.hscx; modejade() local
84 debugl1(cs, "jade %c mode %d ichan %d", 'A' + jade, mode, bc); modejade()
89 cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (mode == L1_MODE_TRANS ? jadeMODE_TMO : 0x00)); modejade()
90 cs->BC_Write_Reg(cs, jade, jade_HDLC_CCR0, (jadeCCR0_PU | jadeCCR0_ITF)); modejade()
91 cs->BC_Write_Reg(cs, jade, jade_HDLC_CCR1, 0x00); modejade()
98 cs->BC_Write_Reg(cs, jade, jade_HDLC_XCCR, 0x07); modejade()
99 cs->BC_Write_Reg(cs, jade, jade_HDLC_RCCR, 0x07); modejade()
102 cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAX, 0x00); modejade()
103 cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAR, 0x00); modejade()
105 cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAX, 0x04); modejade()
106 cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAR, 0x04); modejade()
110 cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, jadeMODE_TMO); modejade()
113 cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (jadeMODE_TMO | jadeMODE_RAC | jadeMODE_XAC)); modejade()
116 cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (jadeMODE_RAC | jadeMODE_XAC)); modejade()
120 cs->BC_Write_Reg(cs, jade, jade_HDLC_RCMD, (jadeRCMD_RRES | jadeRCMD_RMC)); modejade()
121 cs->BC_Write_Reg(cs, jade, jade_HDLC_XCMD, jadeXCMD_XRES); modejade()
123 cs->BC_Write_Reg(cs, jade, jade_HDLC_IMR, 0xF8); modejade()
127 cs->BC_Write_Reg(cs, jade, jade_HDLC_IMR, 0x00); modejade()
262 debugl1(cs, "jade B ISTA %x", val); clear_pending_jade_ints()
264 debugl1(cs, "jade A ISTA %x", val); clear_pending_jade_ints()
266 debugl1(cs, "jade B STAR %x", val); clear_pending_jade_ints()
268 debugl1(cs, "jade A STAR %x", val); clear_pending_jade_ints()
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| H A D | jade_irq.c | 14 waitforCEC(struct IsdnCardState *cs, int jade, int reg) waitforCEC() argument
18 while ((READJADE(cs, jade, jade_HDLC_STAR) & mask) && to) { waitforCEC()
23 printk(KERN_WARNING "HiSax: waitforCEC (jade) timeout\n"); waitforCEC()
28 waitforXFW(struct IsdnCardState *cs, int jade) waitforXFW() argument
30 /* Does not work on older jade versions, don't care */ waitforXFW()
34 WriteJADECMDR(struct IsdnCardState *cs, int jade, int reg, u_char data) WriteJADECMDR() argument
36 waitforCEC(cs, jade, reg); WriteJADECMDR()
37 WRITEJADE(cs, jade, reg, data); WriteJADECMDR()
114 jade_interrupt(struct IsdnCardState *cs, u_char val, u_char jade) jade_interrupt() argument
117 struct BCState *bcs = cs->bcs + jade; jade_interrupt()
121 int i_jade = (int) jade; /* To satisfy the compiler */ jade_interrupt()
131 debugl1(cs, "JADE %s invalid frame", (jade ? "B" : "A")); jade_interrupt()
134 debugl1(cs, "JADE %c RDO mode=%d", 'A' + jade, bcs->mode); jade_interrupt()
137 debugl1(cs, "JADE %c CRC error", 'A' + jade); jade_interrupt()
138 WriteJADECMDR(cs, jade, jade_HDLC_RCMD, jadeRCMD_RMC); jade_interrupt()
148 printk(KERN_WARNING "JADE %s receive out of memory\n", (jade ? "B" : "A")); jade_interrupt()
203 jade_int_main(struct IsdnCardState *cs, u_char val, int jade) jade_int_main() argument
206 bcs = cs->bcs + jade; jade_int_main()
228 debugl1(cs, "JADE %c EXIR %x Lost TX", 'A' + jade, val); jade_int_main()
233 debugl1(cs, "JADE %c interrupt %x", 'A' + jade, val); jade_int_main()
234 jade_interrupt(cs, val, jade); jade_int_main()
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| H A D | bkm_a4t.c | 18 #include "jade.h"
98 ReadJADE(struct IsdnCardState *cs, int jade, u_char offset) ReadJADE() argument
100 return (readreg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, offset + (jade == -1 ? 0 : (jade ? 0xC0 : 0x80)))); ReadJADE()
104 WriteJADE(struct IsdnCardState *cs, int jade, u_char offset, u_char value) WriteJADE() argument
106 writereg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, offset + (jade == -1 ? 0 : (jade ? 0xC0 : 0x80)), value); WriteJADE()
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| H A D | Makefile | 54 hisax-$(CONFIG_HISAX_BKM_A4T) += bkm_a4t.o isac.o arcofi.o jade.o
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| H A D | jade.h | 1 /* $Id: jade.h,v 1.5.2.3 2004/01/14 16:04:48 keil Exp $
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