H A D | ipic.c | 513 static inline void ipic_write(volatile u32 __iomem *base, unsigned int reg, u32 value) ipic_write() function 534 ipic_write(ipic->regs, ipic_info[src].mask, temp); ipic_unmask_irq() 550 ipic_write(ipic->regs, ipic_info[src].mask, temp); ipic_mask_irq() 569 ipic_write(ipic->regs, ipic_info[src].ack, temp); ipic_ack_irq() 589 ipic_write(ipic->regs, ipic_info[src].mask, temp); ipic_mask_irq_and_ack() 592 ipic_write(ipic->regs, ipic_info[src].ack, temp); ipic_mask_irq_and_ack() 652 ipic_write(ipic->regs, IPIC_SECNR, vnew); ipic_set_irq_type() 724 ipic_write(ipic->regs, IPIC_SICNR, 0x0); ipic_init() 741 ipic_write(ipic->regs, IPIC_SICFR, temp); ipic_init() 747 ipic_write(ipic->regs, IPIC_SERCR, temp); ipic_init() 757 ipic_write(ipic->regs, IPIC_SEMSR, temp); ipic_init() 762 ipic_write(ipic->regs, IPIC_SIMSR_H, 0); ipic_init() 763 ipic_write(ipic->regs, IPIC_SIMSR_L, 0); ipic_init() 794 ipic_write(ipic->regs, ipic_info[src].prio, temp); ipic_set_priority() 811 ipic_write(ipic->regs, IPIC_SICFR, temp); ipic_set_highest_priority() 816 ipic_write(primary_ipic->regs, IPIC_SIPRR_A, IPIC_PRIORITY_DEFAULT); ipic_set_default_priority() 817 ipic_write(primary_ipic->regs, IPIC_SIPRR_B, IPIC_PRIORITY_DEFAULT); ipic_set_default_priority() 818 ipic_write(primary_ipic->regs, IPIC_SIPRR_C, IPIC_PRIORITY_DEFAULT); ipic_set_default_priority() 819 ipic_write(primary_ipic->regs, IPIC_SIPRR_D, IPIC_PRIORITY_DEFAULT); ipic_set_default_priority() 820 ipic_write(primary_ipic->regs, IPIC_SMPRR_A, IPIC_PRIORITY_DEFAULT); ipic_set_default_priority() 821 ipic_write(primary_ipic->regs, IPIC_SMPRR_B, IPIC_PRIORITY_DEFAULT); ipic_set_default_priority() 831 ipic_write(ipic->regs, IPIC_SERMR, temp); ipic_enable_mcp() 841 ipic_write(ipic->regs, IPIC_SERMR, temp); ipic_disable_mcp() 851 ipic_write(primary_ipic->regs, IPIC_SERMR, mask); ipic_clear_mcp_status() 905 ipic_write(ipic->regs, IPIC_SIMSR_H, 0); ipic_suspend() 906 ipic_write(ipic->regs, IPIC_SIMSR_L, 0); ipic_suspend() 907 ipic_write(ipic->regs, IPIC_SEMSR, 0); ipic_suspend() 908 ipic_write(ipic->regs, IPIC_SERMR, 0); ipic_suspend() 918 ipic_write(ipic->regs, IPIC_SICFR, ipic_saved_state.sicfr); ipic_resume() 919 ipic_write(ipic->regs, IPIC_SIPRR_A, ipic_saved_state.siprr[0]); ipic_resume() 920 ipic_write(ipic->regs, IPIC_SIPRR_D, ipic_saved_state.siprr[1]); ipic_resume() 921 ipic_write(ipic->regs, IPIC_SIMSR_H, ipic_saved_state.simsr[0]); ipic_resume() 922 ipic_write(ipic->regs, IPIC_SIMSR_L, ipic_saved_state.simsr[1]); ipic_resume() 923 ipic_write(ipic->regs, IPIC_SICNR, ipic_saved_state.sicnr); ipic_resume() 924 ipic_write(ipic->regs, IPIC_SMPRR_A, ipic_saved_state.smprr[0]); ipic_resume() 925 ipic_write(ipic->regs, IPIC_SMPRR_B, ipic_saved_state.smprr[1]); ipic_resume() 926 ipic_write(ipic->regs, IPIC_SEMSR, ipic_saved_state.semsr); ipic_resume() 927 ipic_write(ipic->regs, IPIC_SECNR, ipic_saved_state.secnr); ipic_resume() 928 ipic_write(ipic->regs, IPIC_SERMR, ipic_saved_state.sermr); ipic_resume() 929 ipic_write(ipic->regs, IPIC_SERCR, ipic_saved_state.sercr); ipic_resume()
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