Searched refs:i8254 (Results 1 - 11 of 11) sorted by relevance

/linux-4.1.27/drivers/staging/comedi/drivers/
H A Dcomedi_8254.c133 static unsigned int __i8254_read(struct comedi_8254 *i8254, unsigned int reg) __i8254_read() argument
135 unsigned int reg_offset = (reg * i8254->iosize) << i8254->regshift; __i8254_read()
138 switch (i8254->iosize) { __i8254_read()
141 if (i8254->mmio) __i8254_read()
142 val = readb(i8254->mmio + reg_offset); __i8254_read()
144 val = inb(i8254->iobase + reg_offset); __i8254_read()
147 if (i8254->mmio) __i8254_read()
148 val = readw(i8254->mmio + reg_offset); __i8254_read()
150 val = inw(i8254->iobase + reg_offset); __i8254_read()
153 if (i8254->mmio) __i8254_read()
154 val = readl(i8254->mmio + reg_offset); __i8254_read()
156 val = inl(i8254->iobase + reg_offset); __i8254_read()
162 static void __i8254_write(struct comedi_8254 *i8254, __i8254_write() argument
165 unsigned int reg_offset = (reg * i8254->iosize) << i8254->regshift; __i8254_write()
167 switch (i8254->iosize) { __i8254_write()
170 if (i8254->mmio) __i8254_write()
171 writeb(val, i8254->mmio + reg_offset); __i8254_write()
173 outb(val, i8254->iobase + reg_offset); __i8254_write()
176 if (i8254->mmio) __i8254_write()
177 writew(val, i8254->mmio + reg_offset); __i8254_write()
179 outw(val, i8254->iobase + reg_offset); __i8254_write()
182 if (i8254->mmio) __i8254_write()
183 writel(val, i8254->mmio + reg_offset); __i8254_write()
185 outl(val, i8254->iobase + reg_offset); __i8254_write()
192 * @i8254: comedi_8254 struct for the timer
195 unsigned int comedi_8254_status(struct comedi_8254 *i8254, unsigned int counter) comedi_8254_status() argument
203 __i8254_write(i8254, cmd, I8254_CTRL_REG); comedi_8254_status()
205 return __i8254_read(i8254, counter); comedi_8254_status()
211 * @i8254: comedi_8254 struct for the timer
214 unsigned int comedi_8254_read(struct comedi_8254 *i8254, unsigned int counter) comedi_8254_read() argument
222 __i8254_write(i8254, I8254_CTRL_SEL_CTR(counter) | I8254_CTRL_LATCH, comedi_8254_read()
226 val = __i8254_read(i8254, counter); comedi_8254_read()
227 val |= (__i8254_read(i8254, counter) << 8); comedi_8254_read()
235 * @i8254: comedi_8254 struct for the timer
239 void comedi_8254_write(struct comedi_8254 *i8254, comedi_8254_write() argument
251 __i8254_write(i8254, byte, counter); comedi_8254_write()
253 __i8254_write(i8254, byte, counter); comedi_8254_write()
259 * @i8254: comedi_8254 struct for the timer
263 int comedi_8254_set_mode(struct comedi_8254 *i8254, unsigned int counter, comedi_8254_set_mode() argument
276 __i8254_write(i8254, byte, I8254_CTRL_REG); comedi_8254_set_mode()
284 * @i8254: comedi_8254 struct for the timer
289 int comedi_8254_load(struct comedi_8254 *i8254, unsigned int counter, comedi_8254_load() argument
299 comedi_8254_set_mode(i8254, counter, mode); comedi_8254_load()
300 comedi_8254_write(i8254, counter, val); comedi_8254_load()
308 * @i8254: comedi_8254 struct for the timer
313 void comedi_8254_pacer_enable(struct comedi_8254 *i8254, comedi_8254_pacer_enable() argument
328 comedi_8254_set_mode(i8254, counter1, mode); comedi_8254_pacer_enable()
329 comedi_8254_set_mode(i8254, counter2, mode); comedi_8254_pacer_enable()
337 comedi_8254_write(i8254, counter2, i8254->divisor2); comedi_8254_pacer_enable()
338 comedi_8254_write(i8254, counter1, i8254->divisor1); comedi_8254_pacer_enable()
345 * @i8254: comedi_8254 struct for the timer
347 void comedi_8254_update_divisors(struct comedi_8254 *i8254) comedi_8254_update_divisors() argument
350 i8254->divisor = i8254->next_div & 0xffff; comedi_8254_update_divisors()
351 i8254->divisor1 = i8254->next_div1 & 0xffff; comedi_8254_update_divisors()
352 i8254->divisor2 = i8254->next_div2 & 0xffff; comedi_8254_update_divisors()
358 * @i8254: comedi_8254 struct for the timer
362 void comedi_8254_cascade_ns_to_timer(struct comedi_8254 *i8254, comedi_8254_cascade_ns_to_timer() argument
366 unsigned int d1 = i8254->next_div1 ? i8254->next_div1 : I8254_MAX_COUNT; comedi_8254_cascade_ns_to_timer()
367 unsigned int d2 = i8254->next_div2 ? i8254->next_div2 : I8254_MAX_COUNT; comedi_8254_cascade_ns_to_timer()
381 if (div * i8254->osc_base == *nanosec && comedi_8254_cascade_ns_to_timer()
386 div * i8254->osc_base > div && comedi_8254_cascade_ns_to_timer()
387 div * i8254->osc_base > i8254->osc_base) comedi_8254_cascade_ns_to_timer()
390 div = *nanosec / i8254->osc_base; comedi_8254_cascade_ns_to_timer()
398 ns = i8254->osc_base * d1 * d2; comedi_8254_cascade_ns_to_timer()
415 ns_high = d1_lub * d2_lub * i8254->osc_base; comedi_8254_cascade_ns_to_timer()
416 ns_low = d1_glb * d2_glb * i8254->osc_base; comedi_8254_cascade_ns_to_timer()
435 *nanosec = d1 * d2 * i8254->osc_base; comedi_8254_cascade_ns_to_timer()
436 i8254->next_div1 = d1; comedi_8254_cascade_ns_to_timer()
437 i8254->next_div2 = d2; comedi_8254_cascade_ns_to_timer()
443 * @i8254: comedi_8254 struct for the timer
447 void comedi_8254_ns_to_timer(struct comedi_8254 *i8254, comedi_8254_ns_to_timer() argument
455 divisor = DIV_ROUND_CLOSEST(*nanosec, i8254->osc_base); comedi_8254_ns_to_timer()
458 divisor = DIV_ROUND_UP(*nanosec, i8254->osc_base); comedi_8254_ns_to_timer()
461 divisor = *nanosec / i8254->osc_base; comedi_8254_ns_to_timer()
469 *nanosec = divisor * i8254->osc_base; comedi_8254_ns_to_timer()
470 i8254->next_div = divisor; comedi_8254_ns_to_timer()
476 * @i8254: comedi_8254 struct for the timer
480 void comedi_8254_set_busy(struct comedi_8254 *i8254, comedi_8254_set_busy() argument
484 i8254->busy[counter] = busy; comedi_8254_set_busy()
493 struct comedi_8254 *i8254 = s->private; comedi_8254_insn_read() local
497 if (i8254->busy[chan]) comedi_8254_insn_read()
501 data[i] = comedi_8254_read(i8254, chan); comedi_8254_insn_read()
511 struct comedi_8254 *i8254 = s->private; comedi_8254_insn_write() local
514 if (i8254->busy[chan]) comedi_8254_insn_write()
518 comedi_8254_write(i8254, chan, data[insn->n - 1]); comedi_8254_insn_write()
528 struct comedi_8254 *i8254 = s->private; comedi_8254_insn_config() local
532 if (i8254->busy[chan]) comedi_8254_insn_config()
537 ret = comedi_8254_set_mode(i8254, chan, comedi_8254_insn_config()
543 ret = comedi_8254_set_mode(i8254, chan, data[1]); comedi_8254_insn_config()
548 data[1] = comedi_8254_status(i8254, chan); comedi_8254_insn_config()
555 if (i8254->insn_config) comedi_8254_insn_config()
556 return i8254->insn_config(dev, s, insn, data); comedi_8254_insn_config()
569 struct comedi_8254 *i8254) comedi_8254_subdevice_init()
580 s->private = i8254; comedi_8254_subdevice_init()
590 struct comedi_8254 *i8254; __i8254_init() local
598 i8254 = kzalloc(sizeof(*i8254), GFP_KERNEL); __i8254_init()
599 if (!i8254) __i8254_init()
602 i8254->iobase = iobase; __i8254_init()
603 i8254->mmio = mmio; __i8254_init()
604 i8254->iosize = iosize; __i8254_init()
605 i8254->regshift = regshift; __i8254_init()
608 i8254->osc_base = osc_base ? osc_base : I8254_OSC_BASE_10MHZ; __i8254_init()
612 comedi_8254_set_mode(i8254, i, I8254_MODE0 | I8254_BINARY); __i8254_init()
614 return i8254; __i8254_init()
568 comedi_8254_subdevice_init(struct comedi_subdevice *s, struct comedi_8254 *i8254) comedi_8254_subdevice_init() argument
H A Damplc_dio200_common.c169 struct comedi_8254 *i8254 = s->private; dio200_subdev_8254_offset() local
174 offset = i8254->mmio - dev->mmio; dio200_subdev_8254_offset()
176 offset = i8254->iobase - dev->iobase; dio200_subdev_8254_offset()
520 struct comedi_8254 *i8254 = s->private; dio200_subdev_8254_config() local
535 i8254->gate_src[chan] = src; dio200_subdev_8254_config()
538 data[2] = i8254->gate_src[chan]; dio200_subdev_8254_config()
546 i8254->clock_src[chan] = src; dio200_subdev_8254_config()
549 data[1] = i8254->clock_src[chan]; dio200_subdev_8254_config()
550 data[2] = clock_period[i8254->clock_src[chan]]; dio200_subdev_8254_config()
564 struct comedi_8254 *i8254; dio200_subdev_8254_init() local
580 i8254 = comedi_8254_mm_init(dev->mmio + offset, dio200_subdev_8254_init()
583 i8254 = comedi_8254_init(dev->iobase + offset, dio200_subdev_8254_init()
585 if (!i8254) dio200_subdev_8254_init()
588 comedi_8254_subdevice_init(s, i8254); dio200_subdev_8254_init()
590 i8254->insn_config = dio200_subdev_8254_config; dio200_subdev_8254_init()
594 * use dev->pacer to save the i8254 pointer. Instead, dio200_subdev_8254_init()
595 * comedi_8254_subdevice_init() saved the i8254 pointer in dio200_subdev_8254_init()
/linux-4.1.27/arch/x86/kvm/
H A DMakefile15 i8254.o ioapic.o irq_comm.o cpuid.o pmu.o
H A Dirq.c27 #include "i8254.h"
H A Di8254.c39 #include "i8254.h"
368 "i8254 timer period limited to %lld ns\n", create_pit_timer()
H A Dx86.c25 #include "i8254.h"
/linux-4.1.27/arch/avr32/include/asm/
H A Dtimex.h25 * The obscure number 1193182 is the same as used by the original i8254
/linux-4.1.27/arch/x86/boot/compressed/
H A Daslr.c22 static inline u16 i8254(void) i8254() function
92 debug_putstr(" i8254"); get_random_long()
93 random ^= i8254(); get_random_long()
/linux-4.1.27/arch/x86/kernel/
H A Dtsc_msr.c9 * Especially some Intel Atom SoCs don't have PIT(i8254) or HPET, so MSR
/linux-4.1.27/drivers/clocksource/
H A Di8253.c16 * 0040-0043 : timer0, i8253 / i8254
/linux-4.1.27/include/linux/
H A Dtimex.h160 /* The clock frequency of the i8253/i8254 PIT */

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