Searched refs:cache_levels (Results 1 - 3 of 3) sorted by relevance

/linux-4.1.27/arch/arm/kvm/
H A Dcoproc.c42 static u32 cache_levels; variable
756 ctype = (cache_levels >> (level * 3)) & 7; is_valid_cache()
1230 asm volatile("mrc p15, 1, %0, c0, c0, 1" : "=r" (cache_levels)); kvm_coproc_table_init()
1232 if (((cache_levels >> (i*3)) & 7) == 0) kvm_coproc_table_init()
1235 cache_levels &= (1 << (i*3))-1; kvm_coproc_table_init()
/linux-4.1.27/arch/arm64/kvm/
H A Dsys_regs.c53 static u32 cache_levels; variable
1218 ctype = (cache_levels >> (level * 3)) & 7; is_valid_cache()
1489 cache_levels = clidr.val; kvm_sys_reg_table_init()
1491 if (((cache_levels >> (i*3)) & 7) == 0) kvm_sys_reg_table_init()
1494 cache_levels &= (1 << (i*3))-1; kvm_sys_reg_table_init()
/linux-4.1.27/arch/ia64/include/asm/
H A Dpal.h992 static inline long ia64_pal_cache_summary(unsigned long *cache_levels, ia64_pal_cache_summary() argument
997 if (cache_levels) ia64_pal_cache_summary()
998 *cache_levels = iprv.v0; ia64_pal_cache_summary()

Completed in 190 milliseconds