Searched refs:base_align (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/radeon/
H A Dr600_cs.c252 u64 *base_align) r600_get_array_mode_alignment()
267 *base_align = 1; r600_get_array_mode_alignment()
273 *base_align = values->group_size; r600_get_array_mode_alignment()
281 *base_align = values->group_size; r600_get_array_mode_alignment()
289 *base_align = max(macro_tile_bytes, r600_get_array_mode_alignment()
354 u64 base_offset, base_align; r600_cs_track_validate_cb() local
387 &pitch_align, &height_align, &depth_align, &base_align)) { r600_cs_track_validate_cb()
422 if (!IS_ALIGNED(base_offset, base_align)) { r600_cs_track_validate_cb()
424 base_offset, base_align, array_mode); r600_cs_track_validate_cb()
523 u64 base_offset, base_align; r600_cs_track_validate_db() local
583 &pitch_align, &height_align, &depth_align, &base_align)) { r600_cs_track_validate_db()
613 if (!IS_ALIGNED(base_offset, base_align)) { r600_cs_track_validate_db()
615 base_offset, base_align, array_mode); r600_cs_track_validate_db()
1411 unsigned block_align, unsigned height_align, unsigned base_align, r600_texture_size()
1448 offset = round_up(offset, base_align); r600_texture_size()
1481 u64 base_align; r600_check_texture_resource() local
1556 &pitch_align, &height_align, &depth_align, &base_align)) { r600_check_texture_resource()
1569 if (!IS_ALIGNED(base_offset, base_align)) { r600_check_texture_resource()
1571 __func__, __LINE__, base_offset, base_align, G_038000_TILE_MODE(word0)); r600_check_texture_resource()
1574 if (!IS_ALIGNED(mip_offset, base_align)) { r600_check_texture_resource()
1576 __func__, __LINE__, mip_offset, base_align, G_038000_TILE_MODE(word0)); r600_check_texture_resource()
1591 pitch_align, height_align, base_align, r600_check_texture_resource()
1599 dev_warn(p->dev, "alignments %d %d %d %lld\n", pitch, pitch_align, height_align, base_align); r600_check_texture_resource()
248 r600_get_array_mode_alignment(struct array_mode_checker *values, u32 *pitch_align, u32 *height_align, u32 *depth_align, u64 *base_align) r600_get_array_mode_alignment() argument
1409 r600_texture_size(unsigned nfaces, unsigned blevel, unsigned llevel, unsigned w0, unsigned h0, unsigned d0, unsigned nsamples, unsigned format, unsigned block_align, unsigned height_align, unsigned base_align, unsigned *l0_size, unsigned *mipmap_size) r600_texture_size() argument
H A Devergreen_cs.c183 unsigned long base_align; member in struct:eg_surface
191 surf->base_align = surf->bpe; evergreen_surface_check_linear()
206 surf->base_align = track->group_size; evergreen_surface_check_linear_aligned()
229 surf->base_align = track->group_size; evergreen_surface_check_1d()
271 surf->base_align = (palign / 8) * (halign / 8) * tileb; evergreen_surface_check_2d()
434 if (offset & (surf.base_align - 1)) { evergreen_cs_track_validate_cb()
436 __func__, __LINE__, id, offset, surf.base_align); evergreen_cs_track_validate_cb()
609 if (offset & (surf.base_align - 1)) { evergreen_cs_track_validate_stencil()
611 __func__, __LINE__, offset, surf.base_align); evergreen_cs_track_validate_stencil()
628 if (offset & (surf.base_align - 1)) { evergreen_cs_track_validate_stencil()
630 __func__, __LINE__, offset, surf.base_align); evergreen_cs_track_validate_stencil()
707 if (offset & (surf.base_align - 1)) { evergreen_cs_track_validate_depth()
709 __func__, __LINE__, offset, surf.base_align); evergreen_cs_track_validate_depth()
723 if (offset & (surf.base_align - 1)) { evergreen_cs_track_validate_depth()
725 __func__, __LINE__, offset, surf.base_align); evergreen_cs_track_validate_depth()
833 if (toffset & (surf.base_align - 1)) { evergreen_cs_track_validate_texture()
835 __func__, __LINE__, toffset, surf.base_align); evergreen_cs_track_validate_texture()
838 if (surf.nsamples <= 1 && moffset & (surf.base_align - 1)) { evergreen_cs_track_validate_texture()
840 __func__, __LINE__, moffset, surf.base_align); evergreen_cs_track_validate_texture()
/linux-4.1.27/drivers/scsi/fnic/
H A Dvnic_dev.c173 ring->base_align = 512; vnic_dev_desc_ring_size()
183 ring->size_unaligned = ring->size + ring->base_align; vnic_dev_desc_ring_size()
210 ring->base_align); vnic_dev_alloc_desc_ring()
H A Dvnic_dev.h99 size_t base_align; member in struct:vnic_dev_ring
/linux-4.1.27/drivers/net/ethernet/cisco/enic/
H A Dvnic_dev.h64 size_t base_align; member in struct:vnic_dev_ring
H A Dvnic_dev.c211 ring->base_align = 512; vnic_dev_desc_ring_size()
221 ring->size_unaligned = ring->size + ring->base_align; vnic_dev_desc_ring_size()
247 ring->base_align); vnic_dev_alloc_desc_ring()
/linux-4.1.27/drivers/staging/fsl-mc/include/
H A Ddprc.h460 * The base ID is given at res_req at base_align field
466 * sequential and aligned to the value given at dprc_res_req base_align field

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