Searched refs:_BIT (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/arch/arm/mach-lpc32xx/include/mach/
H A Dplatform.h23 #define _BIT(n) _SBF(n, 1) macro
184 #define LPC32XX_CLKPWR_VFP_CLOCK_ENABLE_BIT _BIT(4)
189 #define LPC32XX_CLKPWR_BOOTMAP_SEL_BIT _BIT(1)
194 #define LPC32XX_CLKPWR_GPIOSRC_P1IO23_BIT _BIT(31)
195 #define LPC32XX_CLKPWR_GPIOSRC_P1IO22_BIT _BIT(30)
196 #define LPC32XX_CLKPWR_GPIOSRC_P1IO21_BIT _BIT(29)
197 #define LPC32XX_CLKPWR_GPIOSRC_P1IO20_BIT _BIT(28)
198 #define LPC32XX_CLKPWR_GPIOSRC_P1IO19_BIT _BIT(27)
199 #define LPC32XX_CLKPWR_GPIOSRC_P1IO18_BIT _BIT(26)
200 #define LPC32XX_CLKPWR_GPIOSRC_P1IO17_BIT _BIT(25)
201 #define LPC32XX_CLKPWR_GPIOSRC_P1IO16_BIT _BIT(24)
202 #define LPC32XX_CLKPWR_GPIOSRC_P1IO15_BIT _BIT(23)
203 #define LPC32XX_CLKPWR_GPIOSRC_P1IO14_BIT _BIT(22)
204 #define LPC32XX_CLKPWR_GPIOSRC_P1IO13_BIT _BIT(21)
205 #define LPC32XX_CLKPWR_GPIOSRC_P1IO12_BIT _BIT(20)
206 #define LPC32XX_CLKPWR_GPIOSRC_P1IO11_BIT _BIT(19)
207 #define LPC32XX_CLKPWR_GPIOSRC_P1IO10_BIT _BIT(18)
208 #define LPC32XX_CLKPWR_GPIOSRC_P1IO9_BIT _BIT(17)
209 #define LPC32XX_CLKPWR_GPIOSRC_P1IO8_BIT _BIT(16)
210 #define LPC32XX_CLKPWR_GPIOSRC_P1IO7_BIT _BIT(15)
211 #define LPC32XX_CLKPWR_GPIOSRC_P1IO6_BIT _BIT(14)
212 #define LPC32XX_CLKPWR_GPIOSRC_P1IO5_BIT _BIT(13)
213 #define LPC32XX_CLKPWR_GPIOSRC_P1IO4_BIT _BIT(12)
214 #define LPC32XX_CLKPWR_GPIOSRC_P1IO3_BIT _BIT(11)
215 #define LPC32XX_CLKPWR_GPIOSRC_P1IO2_BIT _BIT(10)
216 #define LPC32XX_CLKPWR_GPIOSRC_P1IO1_BIT _BIT(9)
217 #define LPC32XX_CLKPWR_GPIOSRC_P1IO0_BIT _BIT(8)
218 #define LPC32XX_CLKPWR_GPIOSRC_P0IO7_BIT _BIT(7)
219 #define LPC32XX_CLKPWR_GPIOSRC_P0IO6_BIT _BIT(6)
220 #define LPC32XX_CLKPWR_GPIOSRC_P0IO5_BIT _BIT(5)
221 #define LPC32XX_CLKPWR_GPIOSRC_P0IO4_BIT _BIT(4)
222 #define LPC32XX_CLKPWR_GPIOSRC_P0IO3_BIT _BIT(3)
223 #define LPC32XX_CLKPWR_GPIOSRC_P0IO2_BIT _BIT(2)
224 #define LPC32XX_CLKPWR_GPIOSRC_P0IO1_BIT _BIT(1)
225 #define LPC32XX_CLKPWR_GPIOSRC_P0IO0_BIT _BIT(0)
236 #define LPC32XX_CLKPWR_INTSRC_ADC_BIT _BIT(31)
237 #define LPC32XX_CLKPWR_INTSRC_TS_P_BIT _BIT(30)
238 #define LPC32XX_CLKPWR_INTSRC_TS_AUX_BIT _BIT(29)
239 #define LPC32XX_CLKPWR_INTSRC_USBAHNEEDCLK_BIT _BIT(26)
240 #define LPC32XX_CLKPWR_INTSRC_MSTIMER_BIT _BIT(25)
241 #define LPC32XX_CLKPWR_INTSRC_RTC_BIT _BIT(24)
242 #define LPC32XX_CLKPWR_INTSRC_USBNEEDCLK_BIT _BIT(23)
243 #define LPC32XX_CLKPWR_INTSRC_USB_BIT _BIT(22)
244 #define LPC32XX_CLKPWR_INTSRC_I2C_BIT _BIT(21)
245 #define LPC32XX_CLKPWR_INTSRC_USBOTGTIMER_BIT _BIT(20)
246 #define LPC32XX_CLKPWR_INTSRC_USBATXINT_BIT _BIT(19)
247 #define LPC32XX_CLKPWR_INTSRC_KEY_BIT _BIT(16)
248 #define LPC32XX_CLKPWR_INTSRC_MAC_BIT _BIT(7)
249 #define LPC32XX_CLKPWR_INTSRC_P0P1_BIT _BIT(6)
250 #define LPC32XX_CLKPWR_INTSRC_GPIO_05_BIT _BIT(5)
251 #define LPC32XX_CLKPWR_INTSRC_GPIO_04_BIT _BIT(4)
252 #define LPC32XX_CLKPWR_INTSRC_GPIO_03_BIT _BIT(3)
253 #define LPC32XX_CLKPWR_INTSRC_GPIO_02_BIT _BIT(2)
254 #define LPC32XX_CLKPWR_INTSRC_GPIO_01_BIT _BIT(1)
255 #define LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT _BIT(0)
261 #define LPC32XX_CLKPWR_EXTSRC_U7_RX_BIT _BIT(31)
262 #define LPC32XX_CLKPWR_EXTSRC_U7_HCTS_BIT _BIT(30)
263 #define LPC32XX_CLKPWR_EXTSRC_U6_IRRX_BIT _BIT(28)
264 #define LPC32XX_CLKPWR_EXTSRC_U5_RX_BIT _BIT(26)
265 #define LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT _BIT(25)
266 #define LPC32XX_CLKPWR_EXTSRC_U3_RX_BIT _BIT(24)
267 #define LPC32XX_CLKPWR_EXTSRC_U2_HCTS_BIT _BIT(23)
268 #define LPC32XX_CLKPWR_EXTSRC_U2_RX_BIT _BIT(22)
269 #define LPC32XX_CLKPWR_EXTSRC_U1_RX_BIT _BIT(21)
270 #define LPC32XX_CLKPWR_EXTSRC_MSDIO_INT_BIT _BIT(18)
271 #define LPC32XX_CLKPWR_EXTSRC_MSDIO_SRT_BIT _BIT(17)
272 #define LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT _BIT(16)
273 #define LPC32XX_CLKPWR_EXTSRC_GPI_05_BIT _BIT(15)
274 #define LPC32XX_CLKPWR_EXTSRC_GPI_04_BIT _BIT(14)
275 #define LPC32XX_CLKPWR_EXTSRC_GPI_03_BIT _BIT(13)
276 #define LPC32XX_CLKPWR_EXTSRC_GPI_02_BIT _BIT(12)
277 #define LPC32XX_CLKPWR_EXTSRC_GPI_01_BIT _BIT(11)
278 #define LPC32XX_CLKPWR_EXTSRC_GPI_00_BIT _BIT(10)
279 #define LPC32XX_CLKPWR_EXTSRC_SYSCLKEN_BIT _BIT(9)
280 #define LPC32XX_CLKPWR_EXTSRC_SPI1_DATIN_BIT _BIT(8)
281 #define LPC32XX_CLKPWR_EXTSRC_GPI_07_BIT _BIT(7)
282 #define LPC32XX_CLKPWR_EXTSRC_SPI2_DATIN_BIT _BIT(6)
283 #define LPC32XX_CLKPWR_EXTSRC_GPI_19_BIT _BIT(5)
284 #define LPC32XX_CLKPWR_EXTSRC_GPI_09_BIT _BIT(4)
285 #define LPC32XX_CLKPWR_EXTSRC_GPI_08_BIT _BIT(3)
299 #define LPC32XX_CLKPWR_CTRL_FORCE_PCLK _BIT(10)
300 #define LPC32XX_CLKPWR_SDRAM_SELF_RFSH _BIT(9)
301 #define LPC32XX_CLKPWR_UPD_SDRAM_SELF_RFSH _BIT(8)
302 #define LPC32XX_CLKPWR_AUTO_SDRAM_SELF_RFSH _BIT(7)
303 #define LPC32XX_CLKPWR_HIGHCORE_STATE_BIT _BIT(5)
304 #define LPC32XX_CLKPWR_SYSCLKEN_STATE_BIT _BIT(4)
305 #define LPC32XX_CLKPWR_SYSCLKEN_GPIO_EN _BIT(3)
306 #define LPC32XX_CLKPWR_SELECT_RUN_MODE _BIT(2)
307 #define LPC32XX_CLKPWR_HIGHCORE_GPIO_EN _BIT(1)
308 #define LPC32XX_CLKPWR_STOP_MODE_CTRL _BIT(0)
313 #define LPC32XX_CLKPWR_PLL397_MSLOCK_STS _BIT(10)
314 #define LPC32XX_CLKPWR_PLL397_BYPASS _BIT(9)
324 #define LPC32XX_CLKPWR_SYSCTRL_PLL397_DIS _BIT(1)
325 #define LPC32XX_CLKPWR_SYSCTRL_PLL397_STS _BIT(0)
332 #define LPC32XX_CLKPWR_TEST_MODE _BIT(1)
333 #define LPC32XX_CLKPWR_MOSC_DISABLE _BIT(0)
340 #define LPC32XX_CLKPWR_SYSCTRL_USEPLL397 _BIT(1)
341 #define LPC32XX_CLKPWR_SYSCTRL_SYSCLKMUX _BIT(0)
362 #define LPC32XX_CLKPWR_HCLKPLL_POWER_UP _BIT(16)
363 #define LPC32XX_CLKPWR_HCLKPLL_CCO_BYPASS _BIT(15)
364 #define LPC32XX_CLKPWR_HCLKPLL_POSTDIV_BYPASS _BIT(14)
365 #define LPC32XX_CLKPWR_HCLKPLL_FDBK_SEL_FCLK _BIT(13)
369 #define LPC32XX_CLKPWR_HCLKPLL_PLL_STS _BIT(0)
375 #define LPC32XX_CLKPWR_ADCCTRL1_PCLK_SEL _BIT(8)
380 #define LPC32XX_CLKPWR_USBCTRL_HCLK_EN _BIT(24)
381 #define LPC32XX_CLKPWR_USBCTRL_USBI2C_EN _BIT(23)
382 #define LPC32XX_CLKPWR_USBCTRL_USBDVND_EN _BIT(22)
383 #define LPC32XX_CLKPWR_USBCTRL_USBHSTND_EN _BIT(21)
387 #define LPC32XX_CLKPWR_USBCTRL_CLK_EN2 _BIT(18)
388 #define LPC32XX_CLKPWR_USBCTRL_CLK_EN1 _BIT(17)
389 #define LPC32XX_CLKPWR_USBCTRL_PLL_PWRUP _BIT(16)
390 #define LPC32XX_CLKPWR_USBCTRL_CCO_BYPASS _BIT(15)
391 #define LPC32XX_CLKPWR_USBCTRL_POSTDIV_BYPASS _BIT(14)
392 #define LPC32XX_CLKPWR_USBCTRL_FDBK_SEL_FCLK _BIT(13)
396 #define LPC32XX_CLKPWR_USBCTRL_PLL_STS _BIT(0)
401 #define LPC32XX_CLKPWR_SDRCLK_FASTSLEW_CLK _BIT(22)
402 #define LPC32XX_CLKPWR_SDRCLK_FASTSLEW _BIT(21)
403 #define LPC32XX_CLKPWR_SDRCLK_FASTSLEW_DAT _BIT(20)
404 #define LPC32XX_CLKPWR_SDRCLK_SW_DDR_RESET _BIT(19)
406 #define LPC32XX_CLKPWR_SDRCLK_DLY_ADDR_STS _BIT(13)
408 #define LPC32XX_CLKPWR_SDRCLK_USE_CAL _BIT(9)
409 #define LPC32XX_CLKPWR_SDRCLK_DO_CAL _BIT(8)
410 #define LPC32XX_CLKPWR_SDRCLK_CAL_ON_RTC _BIT(7)
412 #define LPC32XX_CLKPWR_SDRCLK_USE_DDR _BIT(1)
413 #define LPC32XX_CLKPWR_SDRCLK_CLK_DIS _BIT(0)
418 #define LPC32XX_CLKPWR_SSPCTRL_DMA_SSP1RX _BIT(5)
419 #define LPC32XX_CLKPWR_SSPCTRL_DMA_SSP1TX _BIT(4)
420 #define LPC32XX_CLKPWR_SSPCTRL_DMA_SSP0RX _BIT(3)
421 #define LPC32XX_CLKPWR_SSPCTRL_DMA_SSP0TX _BIT(2)
422 #define LPC32XX_CLKPWR_SSPCTRL_SSPCLK1_EN _BIT(1)
423 #define LPC32XX_CLKPWR_SSPCTRL_SSPCLK0_EN _BIT(0)
428 #define LPC32XX_CLKPWR_I2SCTRL_I2S1_RX_FOR_TX _BIT(6)
429 #define LPC32XX_CLKPWR_I2SCTRL_I2S1_TX_FOR_RX _BIT(5)
430 #define LPC32XX_CLKPWR_I2SCTRL_I2S1_USE_DMA _BIT(4)
431 #define LPC32XX_CLKPWR_I2SCTRL_I2S0_RX_FOR_TX _BIT(3)
432 #define LPC32XX_CLKPWR_I2SCTRL_I2S0_TX_FOR_RX _BIT(2)
433 #define LPC32XX_CLKPWR_I2SCTRL_I2SCLK1_EN _BIT(1)
434 #define LPC32XX_CLKPWR_I2SCTRL_I2SCLK0_EN _BIT(0)
439 #define LPC32XX_CLKPWR_MSCARD_MSDIO_PIN_DIS _BIT(10)
440 #define LPC32XX_CLKPWR_MSCARD_MSDIO_PU_EN _BIT(9)
441 #define LPC32XX_CLKPWR_MSCARD_MSDIO23_DIS _BIT(8)
442 #define LPC32XX_CLKPWR_MSCARD_MSDIO1_DIS _BIT(7)
443 #define LPC32XX_CLKPWR_MSCARD_MSDIO0_DIS _BIT(6)
444 #define LPC32XX_CLKPWR_MSCARD_SDCARD_EN _BIT(5)
454 #define LPC32XX_CLKPWR_MACCTRL_DMACLK_EN _BIT(2)
455 #define LPC32XX_CLKPWR_MACCTRL_MMIOCLK_EN _BIT(1)
456 #define LPC32XX_CLKPWR_MACCTRL_HRCCLK_EN _BIT(0)
465 #define LPC32XX_CLKPWR_TESTCLK_TESTCLK1_EN _BIT(4)
472 #define LPC32XX_CLKPWR_TESTCLK_TESTCLK2_EN _BIT(0)
477 #define LPC32XX_CLKPWR_SW_INT(n) (_BIT(0) | (((n) & 0x7F) << 1))
483 #define LPC32XX_CLKPWR_I2CCLK_USBI2CHI_DRIVE _BIT(4)
484 #define LPC32XX_CLKPWR_I2CCLK_I2C2HI_DRIVE _BIT(3)
485 #define LPC32XX_CLKPWR_I2CCLK_I2C1HI_DRIVE _BIT(2)
486 #define LPC32XX_CLKPWR_I2CCLK_I2C2CLK_EN _BIT(1)
487 #define LPC32XX_CLKPWR_I2CCLK_I2C1CLK_EN _BIT(0)
554 #define LPC32XX_CLKPWR_UART_USE_HCLK _BIT(16)
565 #define LPC32XX_CLKPWR_UARTCLKCTRL_UART6_EN _BIT(3)
566 #define LPC32XX_CLKPWR_UARTCLKCTRL_UART5_EN _BIT(2)
567 #define LPC32XX_CLKPWR_UARTCLKCTRL_UART4_EN _BIT(1)
568 #define LPC32XX_CLKPWR_UARTCLKCTRL_UART3_EN _BIT(0)
656 #define LPC32XX_UART_U3_MD_CTRL_EN _BIT(11)
657 #define LPC32XX_UART_IRRX6_INV_EN _BIT(10)
658 #define LPC32XX_UART_HDPX_EN _BIT(9)
659 #define LPC32XX_UART_UART6_IRDAMOD_BYPASS _BIT(5)
660 #define LPC32XX_RT_IRTX6_INV_EN _BIT(4)
661 #define LPC32XX_RT_IRTX6_INV_MIR_EN _BIT(3)
662 #define LPC32XX_RT_RX_IRPULSE_3_16_115K _BIT(2)
663 #define LPC32XX_RT_TX_IRPULSE_3_16_115K _BIT(1)
664 #define LPC32XX_UART_U5_ROUTE_TO_USB _BIT(0)
671 #define LPC32XX_UART_ENABLED_CLKS_ANY _BIT(14)
706 #define LPC32XX_USB_OTG_AHB_M_CLOCK_ON _BIT(4)
707 #define LPC32XX_USB_OTG_OTG_CLOCK_ON _BIT(3)
708 #define LPC32XX_USB_OTG_I2C_CLOCK_ON _BIT(2)
709 #define LPC32XX_USB_OTG_DEV_CLOCK_ON _BIT(1)
710 #define LPC32XX_USB_OTG_HOST_CLOCK_ON _BIT(0)
/linux-4.1.27/drivers/crypto/
H A Ds5p-sss.c34 #define _BIT(b) _SBF(b, 1) macro
38 #define SSS_FCINTSTAT_BRDMAINT _BIT(3)
39 #define SSS_FCINTSTAT_BTDMAINT _BIT(2)
40 #define SSS_FCINTSTAT_HRDMAINT _BIT(1)
41 #define SSS_FCINTSTAT_PKDMAINT _BIT(0)
44 #define SSS_FCINTENSET_BRDMAINTENSET _BIT(3)
45 #define SSS_FCINTENSET_BTDMAINTENSET _BIT(2)
46 #define SSS_FCINTENSET_HRDMAINTENSET _BIT(1)
47 #define SSS_FCINTENSET_PKDMAINTENSET _BIT(0)
50 #define SSS_FCINTENCLR_BRDMAINTENCLR _BIT(3)
51 #define SSS_FCINTENCLR_BTDMAINTENCLR _BIT(2)
52 #define SSS_FCINTENCLR_HRDMAINTENCLR _BIT(1)
53 #define SSS_FCINTENCLR_PKDMAINTENCLR _BIT(0)
56 #define SSS_FCINTPEND_BRDMAINTP _BIT(3)
57 #define SSS_FCINTPEND_BTDMAINTP _BIT(2)
58 #define SSS_FCINTPEND_HRDMAINTP _BIT(1)
59 #define SSS_FCINTPEND_PKDMAINTP _BIT(0)
62 #define SSS_FCFIFOSTAT_BRFIFOFUL _BIT(7)
63 #define SSS_FCFIFOSTAT_BRFIFOEMP _BIT(6)
64 #define SSS_FCFIFOSTAT_BTFIFOFUL _BIT(5)
65 #define SSS_FCFIFOSTAT_BTFIFOEMP _BIT(4)
66 #define SSS_FCFIFOSTAT_HRFIFOFUL _BIT(3)
67 #define SSS_FCFIFOSTAT_HRFIFOEMP _BIT(2)
68 #define SSS_FCFIFOSTAT_PKFIFOFUL _BIT(1)
69 #define SSS_FCFIFOSTAT_PKFIFOEMP _BIT(0)
72 #define SSS_FCFIFOCTRL_DESSEL _BIT(2)
80 #define SSS_FCBRDMAC_BYTESWAP _BIT(1)
81 #define SSS_FCBRDMAC_FLUSH _BIT(0)
86 #define SSS_FCBTDMAC_BYTESWAP _BIT(1)
87 #define SSS_FCBTDMAC_FLUSH _BIT(0)
92 #define SSS_FCHRDMAC_BYTESWAP _BIT(1)
93 #define SSS_FCHRDMAC_FLUSH _BIT(0)
98 #define SSS_FCPKDMAC_BYTESWAP _BIT(3)
99 #define SSS_FCPKDMAC_DESCEND _BIT(2)
100 #define SSS_FCPKDMAC_TRANSMIT _BIT(1)
101 #define SSS_FCPKDMAC_FLUSH _BIT(0)
107 #define SSS_AES_BYTESWAP_DI _BIT(11)
108 #define SSS_AES_BYTESWAP_DO _BIT(10)
109 #define SSS_AES_BYTESWAP_IV _BIT(9)
110 #define SSS_AES_BYTESWAP_CNT _BIT(8)
111 #define SSS_AES_BYTESWAP_KEY _BIT(7)
112 #define SSS_AES_KEY_CHANGE_MODE _BIT(6)
116 #define SSS_AES_FIFO_MODE _BIT(3)
120 #define SSS_AES_MODE_DECRYPT _BIT(0)
123 #define SSS_AES_BUSY _BIT(2)
124 #define SSS_AES_INPUT_READY _BIT(1)
125 #define SSS_AES_OUTPUT_READY _BIT(0)
142 #define FLAGS_AES_DECRYPT _BIT(0)
/linux-4.1.27/arch/metag/tbx/
H A Dtbictxfpu.S23 * D0Ar2 contains TBICTX_*_BIT values that control what
110 * D0Ar2 contains TBICTX_*_BIT values that control what
H A Dtbictx.S80 * D0Ar2 contains TBICTX_*_BIT values that control what
239 * D0Ar2 contains TBICTX_*_BIT values that control what
/linux-4.1.27/include/linux/
H A Dnetdev_features.h83 #define __NETIF_F(name) __NETIF_F_BIT(NETIF_F_##name##_BIT)
H A Dethtool.h74 #define __ETH_RSS_HASH(name) __ETH_RSS_HASH_BIT(ETH_RSS_HASH_##name##_BIT)
/linux-4.1.27/drivers/net/ethernet/emulex/benet/
H A Dbe.h438 #define BE_WRB_F_BIT(name) BE_WRB_F_##name##_BIT
439 #define BE_WRB_F_MASK(name) BIT_MASK(BE_WRB_F_##name##_BIT)

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