Searched refs:UART01x_FR (Results 1 – 5 of 5) sorted by relevance
27 1001: ldr \rd, [\rx, #UART01x_FR]34 1001: ldr \rd, [\rx, #UART01x_FR]
134 status = readb(uap->port.membase + UART01x_FR); in pl010_rx_chars()177 status = readb(uap->port.membase + UART01x_FR); in pl010_rx_chars()222 status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; in pl010_modem_status()278 unsigned int status = readb(uap->port.membase + UART01x_FR); in pl010_tx_empty()289 status = readb(uap->port.membase + UART01x_FR); in pl010_get_mctrl()351 uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; in pl010_startup()588 status = readb(uap->port.membase + UART01x_FR); in pl010_console_putchar()615 status = readb(uap->port.membase + UART01x_FR); in pl010_console_write()
186 status = readw(uap->port.membase + UART01x_FR); in pl011_fifo_to_tty()650 if (readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF) { in pl011_dma_tx_start()1065 while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_BUSY) in pl011_dma_shutdown()1258 if (readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF) in pl011_tx_char()1294 readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF)) in pl011_tx_chars()1337 status = readw(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; in pl011_modem_status()1439 unsigned int status = readw(uap->port.membase + UART01x_FR); in pl011_tx_empty()1448 unsigned int status = readw(uap->port.membase + UART01x_FR); in pl011_get_mctrl()1545 status = readw(uap->port.membase + UART01x_FR); in pl011_get_poll_char()1558 while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF) in pl011_put_poll_char()[all …]
27 while (readl_relaxed(base + UART01x_FR) & UART01x_FR_TXFF) in putc()
42 #define UART01x_FR 0x18 /* Flag register (Read only). */ macro