Searched refs:TEGRA30_CLK_PLL_P_OUT2 (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h205 #define TEGRA30_CLK_PLL_P_OUT2 181 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h205 #define TEGRA30_CLK_PLL_P_OUT2 181 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h205 #define TEGRA30_CLK_PLL_P_OUT2 181 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h205 #define TEGRA30_CLK_PLL_P_OUT2 181 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h205 #define TEGRA30_CLK_PLL_P_OUT2 181 macro
/linux-4.1.27/include/dt-bindings/clock/
H A Dtegra30-car.h205 #define TEGRA30_CLK_PLL_P_OUT2 181 macro
/linux-4.1.27/drivers/clk/tegra/
H A Dclk-tegra30.c595 { .con_id = "pll_p_out2", .dt_id = TEGRA30_CLK_PLL_P_OUT2 },
860 [tegra_clk_pll_p_out2] = { .dt_id = TEGRA30_CLK_PLL_P_OUT2, .present = true },

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