Searched refs:TEGRA30_CLK_PLL_A (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h208 #define TEGRA30_CLK_PLL_A 184 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h208 #define TEGRA30_CLK_PLL_A 184 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h208 #define TEGRA30_CLK_PLL_A 184 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h208 #define TEGRA30_CLK_PLL_A 184 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h208 #define TEGRA30_CLK_PLL_A 184 macro
/linux-4.1.27/include/dt-bindings/clock/
H A Dtegra30-car.h208 #define TEGRA30_CLK_PLL_A 184 macro
/linux-4.1.27/drivers/clk/tegra/
H A Dclk-tegra30.c607 { .con_id = "pll_a", .dt_id = TEGRA30_CLK_PLL_A },
863 [tegra_clk_pll_a] = { .dt_id = TEGRA30_CLK_PLL_A, .present = true },
1344 {TEGRA30_CLK_PLL_A, TEGRA30_CLK_CLK_MAX, 564480000, 1},

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